Symbol: XFM_SF
sys/dev/drm/amd/display/dc/dce/dce_transform.h
115
XFM_SF(OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MIN_B_CB, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
116
XFM_SF(OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MAX_B_CB, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
117
XFM_SF(OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MIN_G_Y, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
118
XFM_SF(OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MAX_G_Y, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
119
XFM_SF(OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MIN_R_CR, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
120
XFM_SF(OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MAX_R_CR, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
121
XFM_SF(OUT_ROUND_CONTROL, OUT_ROUND_TRUNC_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
122
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
123
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
124
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_DEPTH, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
125
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_FRAME_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
126
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_RGB_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
127
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_HIGHPASS_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
128
XFM_SF(DENORM_CONTROL, DENORM_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
129
XFM_SF(LB_DATA_FORMAT, PIXEL_DEPTH, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
130
XFM_SF(LB_DATA_FORMAT, PIXEL_EXPAN_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
131
XFM_SF(GAMUT_REMAP_C11_C12, GAMUT_REMAP_C11, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
132
XFM_SF(GAMUT_REMAP_C11_C12, GAMUT_REMAP_C12, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
133
XFM_SF(GAMUT_REMAP_C13_C14, GAMUT_REMAP_C13, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
134
XFM_SF(GAMUT_REMAP_C13_C14, GAMUT_REMAP_C14, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
135
XFM_SF(GAMUT_REMAP_C21_C22, GAMUT_REMAP_C21, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
136
XFM_SF(GAMUT_REMAP_C21_C22, GAMUT_REMAP_C22, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
137
XFM_SF(GAMUT_REMAP_C23_C24, GAMUT_REMAP_C23, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
138
XFM_SF(GAMUT_REMAP_C23_C24, GAMUT_REMAP_C24, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
139
XFM_SF(GAMUT_REMAP_C31_C32, GAMUT_REMAP_C31, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
140
XFM_SF(GAMUT_REMAP_C31_C32, GAMUT_REMAP_C32, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
141
XFM_SF(GAMUT_REMAP_C33_C34, GAMUT_REMAP_C33, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
142
XFM_SF(GAMUT_REMAP_C33_C34, GAMUT_REMAP_C34, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
143
XFM_SF(GAMUT_REMAP_CONTROL, GRPH_GAMUT_REMAP_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
144
XFM_SF(OUTPUT_CSC_C11_C12, OUTPUT_CSC_C11, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
145
XFM_SF(OUTPUT_CSC_C11_C12, OUTPUT_CSC_C12, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
146
XFM_SF(OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
147
XFM_SF(REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
148
XFM_SF(REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START_SEGMENT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
149
XFM_SF(REGAMMA_CNTLA_SLOPE_CNTL, REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
150
XFM_SF(REGAMMA_CNTLA_END_CNTL1, REGAMMA_CNTLA_EXP_REGION_END, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
151
XFM_SF(REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_BASE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
152
XFM_SF(REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_SLOPE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
153
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
154
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
155
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
156
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
157
XFM_SF(REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
158
XFM_SF(REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
159
XFM_SF(SCL_MODE, SCL_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
160
XFM_SF(SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
161
XFM_SF(SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
162
XFM_SF(SCL_CONTROL, SCL_BOUNDARY_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
163
XFM_SF(SCL_BYPASS_CONTROL, SCL_BYPASS_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
164
XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
165
XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
166
XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_TOP, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
167
XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_BOTTOM, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
168
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
169
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_PHASE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
170
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_TAP_PAIR_IDX, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
171
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
172
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
173
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
174
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
175
XFM_SF(VIEWPORT_START, VIEWPORT_X_START, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
176
XFM_SF(VIEWPORT_START, VIEWPORT_Y_START, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
177
XFM_SF(VIEWPORT_SIZE, VIEWPORT_HEIGHT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
178
XFM_SF(VIEWPORT_SIZE, VIEWPORT_WIDTH, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
179
XFM_SF(SCL_HORZ_FILTER_SCALE_RATIO, SCL_H_SCALE_RATIO, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
180
XFM_SF(SCL_VERT_FILTER_SCALE_RATIO, SCL_V_SCALE_RATIO, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
181
XFM_SF(SCL_HORZ_FILTER_INIT, SCL_H_INIT_INT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
182
XFM_SF(SCL_HORZ_FILTER_INIT, SCL_H_INIT_FRAC, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
183
XFM_SF(SCL_VERT_FILTER_INIT, SCL_V_INIT_INT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
184
XFM_SF(SCL_VERT_FILTER_INIT, SCL_V_INIT_FRAC, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
185
XFM_SF(LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
186
XFM_SF(LB_MEMORY_CTRL, LB_MEMORY_SIZE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
187
XFM_SF(SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
188
XFM_SF(SCL_HORZ_FILTER_CONTROL, SCL_H_2TAP_HARDCODE_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
189
XFM_SF(SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
190
XFM_SF(LB_DATA_FORMAT, ALPHA_EN, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_transform.h
200
XFM_SF(DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
201
XFM_SF(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
202
XFM_SF(DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
203
XFM_SF(DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
204
XFM_SF(DCFE_MEM_PWR_STATUS, DCP_REGAMMA_MEM_PWR_STATE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
205
XFM_SF(SCL_MODE, SCL_PSCL_EN, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_transform.h
208
XFM_SF(DCP0_OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MIN_B_CB, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
209
XFM_SF(DCP0_OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MAX_B_CB, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
210
XFM_SF(DCP0_OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MIN_G_Y, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
211
XFM_SF(DCP0_OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MAX_G_Y, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
212
XFM_SF(DCP0_OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MIN_R_CR, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
213
XFM_SF(DCP0_OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MAX_R_CR, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
214
XFM_SF(DCP0_OUT_ROUND_CONTROL, OUT_ROUND_TRUNC_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
215
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
216
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
217
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_DEPTH, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
218
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_FRAME_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
219
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_RGB_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
220
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_HIGHPASS_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
221
XFM_SF(DCP0_DENORM_CONTROL, DENORM_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
222
XFM_SF(LB0_LB_DATA_FORMAT, PIXEL_DEPTH, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
223
XFM_SF(LB0_LB_DATA_FORMAT, PIXEL_EXPAN_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
224
XFM_SF(DCP0_GAMUT_REMAP_C11_C12, GAMUT_REMAP_C11, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
225
XFM_SF(DCP0_GAMUT_REMAP_C11_C12, GAMUT_REMAP_C12, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
226
XFM_SF(DCP0_GAMUT_REMAP_C13_C14, GAMUT_REMAP_C13, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
227
XFM_SF(DCP0_GAMUT_REMAP_C13_C14, GAMUT_REMAP_C14, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
228
XFM_SF(DCP0_GAMUT_REMAP_C21_C22, GAMUT_REMAP_C21, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
229
XFM_SF(DCP0_GAMUT_REMAP_C21_C22, GAMUT_REMAP_C22, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
230
XFM_SF(DCP0_GAMUT_REMAP_C23_C24, GAMUT_REMAP_C23, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
231
XFM_SF(DCP0_GAMUT_REMAP_C23_C24, GAMUT_REMAP_C24, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
232
XFM_SF(DCP0_GAMUT_REMAP_C31_C32, GAMUT_REMAP_C31, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
233
XFM_SF(DCP0_GAMUT_REMAP_C31_C32, GAMUT_REMAP_C32, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
234
XFM_SF(DCP0_GAMUT_REMAP_C33_C34, GAMUT_REMAP_C33, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
235
XFM_SF(DCP0_GAMUT_REMAP_C33_C34, GAMUT_REMAP_C34, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
236
XFM_SF(DCP0_GAMUT_REMAP_CONTROL, GRPH_GAMUT_REMAP_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
237
XFM_SF(DCP0_OUTPUT_CSC_C11_C12, OUTPUT_CSC_C11, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
238
XFM_SF(DCP0_OUTPUT_CSC_C11_C12, OUTPUT_CSC_C12, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
239
XFM_SF(DCP0_OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
240
XFM_SF(DCP0_REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
241
XFM_SF(DCP0_REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START_SEGMENT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
242
XFM_SF(DCP0_REGAMMA_CNTLA_SLOPE_CNTL, REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
243
XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL1, REGAMMA_CNTLA_EXP_REGION_END, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
244
XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_BASE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
245
XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_SLOPE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
246
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
247
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
248
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
249
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
250
XFM_SF(DCP0_REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
251
XFM_SF(DCP0_REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
252
XFM_SF(SCL0_SCL_MODE, SCL_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
253
XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
254
XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
255
XFM_SF(SCL0_SCL_CONTROL, SCL_BOUNDARY_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
256
XFM_SF(SCL0_SCL_BYPASS_CONTROL, SCL_BYPASS_MODE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
257
XFM_SF(SCL0_EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
258
XFM_SF(SCL0_EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
259
XFM_SF(SCL0_EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_TOP, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
260
XFM_SF(SCL0_EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_BOTTOM, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
261
XFM_SF(SCL0_SCL_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
262
XFM_SF(SCL0_SCL_COEF_RAM_SELECT, SCL_C_RAM_PHASE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
263
XFM_SF(SCL0_SCL_COEF_RAM_SELECT, SCL_C_RAM_TAP_PAIR_IDX, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
264
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
265
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
266
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
267
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
268
XFM_SF(SCL0_VIEWPORT_START, VIEWPORT_X_START, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
269
XFM_SF(SCL0_VIEWPORT_START, VIEWPORT_Y_START, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
270
XFM_SF(SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
271
XFM_SF(SCL0_VIEWPORT_SIZE, VIEWPORT_WIDTH, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
272
XFM_SF(SCL0_SCL_HORZ_FILTER_SCALE_RATIO, SCL_H_SCALE_RATIO, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
273
XFM_SF(SCL0_SCL_VERT_FILTER_SCALE_RATIO, SCL_V_SCALE_RATIO, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
274
XFM_SF(SCL0_SCL_HORZ_FILTER_INIT, SCL_H_INIT_INT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
275
XFM_SF(SCL0_SCL_HORZ_FILTER_INIT, SCL_H_INIT_FRAC, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
276
XFM_SF(SCL0_SCL_VERT_FILTER_INIT, SCL_V_INIT_INT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
277
XFM_SF(SCL0_SCL_VERT_FILTER_INIT, SCL_V_INIT_FRAC, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
278
XFM_SF(LB0_LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
279
XFM_SF(LB0_LB_MEMORY_CTRL, LB_MEMORY_SIZE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
280
XFM_SF(SCL0_SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
281
XFM_SF(SCL0_SCL_HORZ_FILTER_CONTROL, SCL_H_2TAP_HARDCODE_COEF_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
282
XFM_SF(SCL0_SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
283
XFM_SF(LB0_LB_DATA_FORMAT, ALPHA_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
284
XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
285
XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
286
XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_transform.h
287
XFM_SF(DCFE0_DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
288
XFM_SF(SCL0_SCL_MODE, SCL_PSCL_EN, mask_sh)