sys/dev/drm/radeon/si.c

7461

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);

sys/dev/drm/radeon/si.c

7466

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK);

sys/dev/drm/radeon/si.c

7477

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);

sys/dev/drm/radeon/si.c

7493

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2,

sys/dev/drm/radeon/si.c

7498

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_BYPASS_EN_MASK,

sys/dev/drm/radeon/si.c

7503

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK,

sys/dev/drm/radeon/si.c

7515

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_5, 0, ~RESET_ANTI_MUX_MASK);

sys/dev/drm/radeon/si.c

7518

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_VCO_MODE_MASK,

sys/dev/drm/radeon/si.c

7522

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK,

sys/dev/drm/radeon/si.c

7524

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_SLEEP_MASK);

sys/dev/drm/radeon/si.c

7527

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_RESET_MASK);

sys/dev/drm/radeon/si.c

7536

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_RESET_MASK, ~VCEPLL_RESET_MASK);

sys/dev/drm/radeon/si.c

7539

WREG32_SMC_P(CG_VCEPLL_SPREAD_SPECTRUM, 0, ~SSEN_MASK);

sys/dev/drm/radeon/si.c

7542

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_3, VCEPLL_FB_DIV(fb_div), ~VCEPLL_FB_DIV_MASK);

sys/dev/drm/radeon/si.c

7545

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_REF_DIV_MASK);

sys/dev/drm/radeon/si.c

7548

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2,

sys/dev/drm/radeon/si.c

7556

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_RESET_MASK);

sys/dev/drm/radeon/si.c

7561

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_BYPASS_EN_MASK);

sys/dev/drm/radeon/si.c

7568

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2,