sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

95

return WREG32_SMC(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

443

WREG32_SMC(*pos, value);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1026

WREG32_SMC(ixCG_THERMAL_INT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1033

WREG32_SMC(ixCG_THERMAL_CTRL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1050

WREG32_SMC(ixCG_THERMAL_INT, thermal_int);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1059

WREG32_SMC(ixCG_THERMAL_INT, thermal_int);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1087

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1091

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1274

WREG32_SMC(ixCG_FDO_CTRL0, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1358

WREG32_SMC(CG_TACH_CTRL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1374

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1378

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1399

WREG32_SMC(ixCG_TACH_CTRL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1404

WREG32_SMC(ixCG_FDO_CTRL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1565

WREG32_SMC(ixCG_THERMAL_CTRL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1573

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1577

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1652

WREG32_SMC(ixLCAC_MC0_CNTL, 0x05);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1653

WREG32_SMC(ixLCAC_MC1_CNTL, 0x05);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1654

WREG32_SMC(ixLCAC_CPL_CNTL, 0x100005);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1658

WREG32_SMC(ixLCAC_MC0_CNTL, 0x400005);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1659

WREG32_SMC(ixLCAC_MC1_CNTL, 0x400005);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1660

WREG32_SMC(ixLCAC_CPL_CNTL, 0x500005);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1688

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1692

WREG32_SMC(ixSCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1749

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1753

WREG32_SMC(ixSCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1780

WREG32_SMC(ixSCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2045

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2054

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2131

WREG32_SMC(ixCG_DISPLAY_GAP_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2142

WREG32_SMC(ixCG_DISPLAY_GAP_CNTL2, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2160

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2165

WREG32_SMC(ixCG_SPLL_SPREAD_SPECTRUM, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2169

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2175

WREG32_SMC(ixCG_STATIC_SCREEN_PARAMETER,

sys/dev/drm/amd/amdgpu/ci_dpm.c

2189

WREG32_SMC(ixCG_DISPLAY_GAP_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2198

WREG32_SMC(ixSCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2200

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_0, CISLANDS_VRC_DFLT0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2201

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_1, CISLANDS_VRC_DFLT1);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2202

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_2, CISLANDS_VRC_DFLT2);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2203

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_3, CISLANDS_VRC_DFLT3);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2204

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_4, CISLANDS_VRC_DFLT4);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2205

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_5, CISLANDS_VRC_DFLT5);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2206

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_6, CISLANDS_VRC_DFLT6);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2207

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_7, CISLANDS_VRC_DFLT7);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2216

WREG32_SMC(ixSCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2218

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_0, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2219

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_1, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2220

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_2, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2221

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_3, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2222

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_4, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2223

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_5, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2224

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_6, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2225

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_7, 0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2241

WREG32_SMC(ixSMC_SYSCON_MISC_CNTL, 1);

sys/dev/drm/amd/amdgpu/ci_dpm.c

3730

WREG32_SMC(ixCG_ULV_PARAMETER, ulv->cg_ulv_parameter);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4239

WREG32_SMC(ixDPM_TABLE_475, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4279

WREG32_SMC(ixDPM_TABLE_475, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4308

WREG32_SMC(ixDPM_TABLE_475, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4943

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6014

WREG32_SMC(ixCNB_PWRMGT_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6461

WREG32_SMC(ixCG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6466

WREG32_SMC(ixCG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6478

WREG32_SMC(ixCG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6483

WREG32_SMC(ixCG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/ci_dpm.c

723

WREG32_SMC(config_regs->offset, data);

sys/dev/drm/amd/amdgpu/ci_smc.c

122

WREG32_SMC(ixSMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_smc.c

130

WREG32_SMC(ixSMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/amd/amdgpu/ci_smc.c

146

WREG32_SMC(ixSMC_SYSCON_CLOCK_CNTL_0, tmp);

sys/dev/drm/amd/amdgpu/ci_smc.c

155

WREG32_SMC(ixSMC_SYSCON_CLOCK_CNTL_0, tmp);

sys/dev/drm/amd/amdgpu/cik.c

1315

WREG32_SMC(cntl_reg, tmp);

sys/dev/drm/amd/amdgpu/cik.c

1364

WREG32_SMC(ixCG_ECLK_CNTL, tmp);

sys/dev/drm/amd/amdgpu/cik.c

1654

WREG32_SMC(ixTHM_CLK_CNTL, data);

sys/dev/drm/amd/amdgpu/cik.c

1662

WREG32_SMC(ixMISC_CLK_CTRL, data);

sys/dev/drm/amd/amdgpu/cik.c

1667

WREG32_SMC(ixCG_CLKPIN_CNTL, data);

sys/dev/drm/amd/amdgpu/cik.c

1672

WREG32_SMC(ixCG_CLKPIN_CNTL_2, data);

sys/dev/drm/amd/amdgpu/cik.c

1678

WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data);

sys/dev/drm/amd/amdgpu/cik.c

920

WREG32_SMC(ixROM_CNTL, rom_cntl | ROM_CNTL__SCK_OVERWRITE_MASK);

sys/dev/drm/amd/amdgpu/cik.c

931

WREG32_SMC(ixROM_CNTL, rom_cntl);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

790

WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2517

WREG32_SMC(ixNB_DPM_CONFIG_1, nbdpmconfig1);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2542

WREG32_SMC(ixCG_THERMAL_INT_CTRL, tmp);

sys/dev/drm/amd/amdgpu/kv_dpm.c

3152

WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);

sys/dev/drm/amd/amdgpu/kv_dpm.c

3157

WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);

sys/dev/drm/amd/amdgpu/kv_dpm.c

3169

WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);

sys/dev/drm/amd/amdgpu/kv_dpm.c

3174

WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);

sys/dev/drm/amd/amdgpu/kv_dpm.c

404

WREG32_SMC(local_cac_reg->cntl, data);

sys/dev/drm/amd/amdgpu/kv_dpm.c

444

WREG32_SMC(config_regs->offset, data);

sys/dev/drm/amd/amdgpu/kv_dpm.c

535

WREG32_SMC(ixLCAC_SX0_OVR_SEL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

536

WREG32_SMC(ixLCAC_SX0_OVR_VAL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

539

WREG32_SMC(ixLCAC_MC0_OVR_SEL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

540

WREG32_SMC(ixLCAC_MC0_OVR_VAL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

543

WREG32_SMC(ixLCAC_MC1_OVR_SEL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

544

WREG32_SMC(ixLCAC_MC1_OVR_VAL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

547

WREG32_SMC(ixLCAC_MC2_OVR_SEL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

548

WREG32_SMC(ixLCAC_MC2_OVR_VAL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

551

WREG32_SMC(ixLCAC_MC3_OVR_SEL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

552

WREG32_SMC(ixLCAC_MC3_OVR_VAL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

555

WREG32_SMC(ixLCAC_CPL_OVR_SEL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

556

WREG32_SMC(ixLCAC_CPL_OVR_VAL, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

654

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_0, 0x3FFFC100);

sys/dev/drm/amd/amdgpu/kv_dpm.c

659

WREG32_SMC(ixCG_FREQ_TRAN_VOTING_0, 0);

sys/dev/drm/amd/amdgpu/kv_dpm.c

731

WREG32_SMC(ixGENERAL_PWRMGT, tmp);

sys/dev/drm/amd/amdgpu/kv_dpm.c

749

WREG32_SMC(ixSCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);

sys/dev/drm/amd/amdgpu/kv_dpm.c

759

WREG32_SMC(ixSCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);

sys/dev/drm/amd/amdgpu/si_dpm.c

2863

WREG32_SMC(offset, data);

sys/dev/drm/amd/amdgpu/si_dpm.c

7514

WREG32_SMC(CG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/si_dpm.c

7519

WREG32_SMC(CG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/si_dpm.c

7531

WREG32_SMC(CG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/si_dpm.c

7536

WREG32_SMC(CG_THERMAL_INT, cg_thermal_int);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1695

WREG32_SMC(ixGCK_DFS_BYPASS_CNTL, tmp);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

882

WREG32_SMC(ixGCK_DFS_BYPASS_CNTL, tmp);

sys/dev/drm/amd/amdgpu/vi.c

1356

WREG32_SMC(ixCGTT_ROM_CLK_CTRL0, data);

sys/dev/drm/amd/amdgpu/vi.c

404

WREG32_SMC(ixROM_CNTL, rom_cntl | ROM_CNTL__SCK_OVERWRITE_MASK);

sys/dev/drm/amd/amdgpu/vi.c

415

WREG32_SMC(ixROM_CNTL, rom_cntl);

sys/dev/drm/amd/amdgpu/vi.c

739

WREG32_SMC(cntl_reg, tmp);

sys/dev/drm/amd/amdgpu/vi.c

829

WREG32_SMC(reg_ctrl, tmp);

sys/dev/drm/radeon/ci_dpm.c

1162

WREG32_SMC(CG_FDO_CTRL0, tmp);

sys/dev/drm/radeon/ci_dpm.c

1239

WREG32_SMC(CG_TACH_CTRL, tmp);

sys/dev/drm/radeon/ci_dpm.c

1255

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

1259

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

1279

WREG32_SMC(CG_TACH_CTRL, tmp);

sys/dev/drm/radeon/ci_dpm.c

1284

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

1447

WREG32_SMC(CG_THERMAL_CTRL, tmp);

sys/dev/drm/radeon/ci_dpm.c

1455

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

1459

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

1533

WREG32_SMC(LCAC_MC0_CNTL, 0x05);

sys/dev/drm/radeon/ci_dpm.c

1534

WREG32_SMC(LCAC_MC1_CNTL, 0x05);

sys/dev/drm/radeon/ci_dpm.c

1535

WREG32_SMC(LCAC_CPL_CNTL, 0x100005);

sys/dev/drm/radeon/ci_dpm.c

1539

WREG32_SMC(LCAC_MC0_CNTL, 0x400005);

sys/dev/drm/radeon/ci_dpm.c

1540

WREG32_SMC(LCAC_MC1_CNTL, 0x400005);

sys/dev/drm/radeon/ci_dpm.c

1541

WREG32_SMC(LCAC_CPL_CNTL, 0x500005);

sys/dev/drm/radeon/ci_dpm.c

1569

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

1573

WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

1630

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

1634

WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

1661

WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

1947

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

1956

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

2033

WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

2044

WREG32_SMC(CG_DISPLAY_GAP_CNTL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

2062

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

2067

WREG32_SMC(CG_SPLL_SPREAD_SPECTRUM, tmp);

sys/dev/drm/radeon/ci_dpm.c

2071

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

2077

WREG32_SMC(CG_SSP, (SSTU(R600_SSTU_DFLT) | SST(R600_SST_DFLT)));

sys/dev/drm/radeon/ci_dpm.c

2088

WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

2097

WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

2099

WREG32_SMC(CG_FTV_0, CISLANDS_VRC_DFLT0);

sys/dev/drm/radeon/ci_dpm.c

2100

WREG32_SMC(CG_FTV_1, CISLANDS_VRC_DFLT1);

sys/dev/drm/radeon/ci_dpm.c

2101

WREG32_SMC(CG_FTV_2, CISLANDS_VRC_DFLT2);

sys/dev/drm/radeon/ci_dpm.c

2102

WREG32_SMC(CG_FTV_3, CISLANDS_VRC_DFLT3);

sys/dev/drm/radeon/ci_dpm.c

2103

WREG32_SMC(CG_FTV_4, CISLANDS_VRC_DFLT4);

sys/dev/drm/radeon/ci_dpm.c

2104

WREG32_SMC(CG_FTV_5, CISLANDS_VRC_DFLT5);

sys/dev/drm/radeon/ci_dpm.c

2105

WREG32_SMC(CG_FTV_6, CISLANDS_VRC_DFLT6);

sys/dev/drm/radeon/ci_dpm.c

2106

WREG32_SMC(CG_FTV_7, CISLANDS_VRC_DFLT7);

sys/dev/drm/radeon/ci_dpm.c

2115

WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

2117

WREG32_SMC(CG_FTV_0, 0);

sys/dev/drm/radeon/ci_dpm.c

2118

WREG32_SMC(CG_FTV_1, 0);

sys/dev/drm/radeon/ci_dpm.c

2119

WREG32_SMC(CG_FTV_2, 0);

sys/dev/drm/radeon/ci_dpm.c

2120

WREG32_SMC(CG_FTV_3, 0);

sys/dev/drm/radeon/ci_dpm.c

2121

WREG32_SMC(CG_FTV_4, 0);

sys/dev/drm/radeon/ci_dpm.c

2122

WREG32_SMC(CG_FTV_5, 0);

sys/dev/drm/radeon/ci_dpm.c

2123

WREG32_SMC(CG_FTV_6, 0);

sys/dev/drm/radeon/ci_dpm.c

2124

WREG32_SMC(CG_FTV_7, 0);

sys/dev/drm/radeon/ci_dpm.c

2136

WREG32_SMC(SMC_SYSCON_MISC_CNTL, 1);

sys/dev/drm/radeon/ci_dpm.c

3619

WREG32_SMC(CG_ULV_PARAMETER, ulv->cg_ulv_parameter);

sys/dev/drm/radeon/ci_dpm.c

4127

WREG32_SMC(DPM_TABLE_475, tmp);

sys/dev/drm/radeon/ci_dpm.c

4165

WREG32_SMC(DPM_TABLE_475, tmp);

sys/dev/drm/radeon/ci_dpm.c

4195

WREG32_SMC(DPM_TABLE_475, tmp);

sys/dev/drm/radeon/ci_dpm.c

4828

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/ci_dpm.c

5915

WREG32_SMC(CNB_PWRMGT_CNTL, tmp);

sys/dev/drm/radeon/ci_dpm.c

592

WREG32_SMC(config_regs->offset, data);

sys/dev/drm/radeon/ci_dpm.c

924

WREG32_SMC(CG_THERMAL_INT, tmp);

sys/dev/drm/radeon/ci_dpm.c

931

WREG32_SMC(CG_THERMAL_CTRL, tmp);

sys/dev/drm/radeon/ci_dpm.c

948

WREG32_SMC(CG_THERMAL_INT, thermal_int);

sys/dev/drm/radeon/ci_dpm.c

957

WREG32_SMC(CG_THERMAL_INT, thermal_int);

sys/dev/drm/radeon/ci_dpm.c

984

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_dpm.c

988

WREG32_SMC(CG_FDO_CTRL2, tmp);

sys/dev/drm/radeon/ci_smc.c

119

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/ci_smc.c

127

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/ci_smc.c

143

WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

sys/dev/drm/radeon/ci_smc.c

152

WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

sys/dev/drm/radeon/cik.c

9456

WREG32_SMC(cntl_reg, tmp);

sys/dev/drm/radeon/cik.c

9503

WREG32_SMC(CG_ECLK_CNTL, tmp);

sys/dev/drm/radeon/cik.c

9786

WREG32_SMC(THM_CLK_CNTL, data);

sys/dev/drm/radeon/cik.c

9792

WREG32_SMC(MISC_CLK_CTRL, data);

sys/dev/drm/radeon/cik.c

9797

WREG32_SMC(CG_CLKPIN_CNTL, data);

sys/dev/drm/radeon/cik.c

9802

WREG32_SMC(CG_CLKPIN_CNTL_2, data);

sys/dev/drm/radeon/cik.c

9808

WREG32_SMC(MPLL_BYPASSCLK_SEL, data);

sys/dev/drm/radeon/kv_dpm.c

1178

WREG32_SMC(CG_THERMAL_INT_CTRL, thermal_int);

sys/dev/drm/radeon/kv_dpm.c

2444

WREG32_SMC(NB_DPM_CONFIG_1, nbdpmconfig1);

sys/dev/drm/radeon/kv_dpm.c

2468

WREG32_SMC(CG_THERMAL_INT_CTRL, tmp);

sys/dev/drm/radeon/kv_dpm.c

272

WREG32_SMC(local_cac_reg->cntl, data);

sys/dev/drm/radeon/kv_dpm.c

312

WREG32_SMC(config_regs->offset, data);

sys/dev/drm/radeon/kv_dpm.c

403

WREG32_SMC(LCAC_SX0_OVR_SEL, 0);

sys/dev/drm/radeon/kv_dpm.c

404

WREG32_SMC(LCAC_SX0_OVR_VAL, 0);

sys/dev/drm/radeon/kv_dpm.c

407

WREG32_SMC(LCAC_MC0_OVR_SEL, 0);

sys/dev/drm/radeon/kv_dpm.c

408

WREG32_SMC(LCAC_MC0_OVR_VAL, 0);

sys/dev/drm/radeon/kv_dpm.c

411

WREG32_SMC(LCAC_MC1_OVR_SEL, 0);

sys/dev/drm/radeon/kv_dpm.c

412

WREG32_SMC(LCAC_MC1_OVR_VAL, 0);

sys/dev/drm/radeon/kv_dpm.c

415

WREG32_SMC(LCAC_MC2_OVR_SEL, 0);

sys/dev/drm/radeon/kv_dpm.c

416

WREG32_SMC(LCAC_MC2_OVR_VAL, 0);

sys/dev/drm/radeon/kv_dpm.c

419

WREG32_SMC(LCAC_MC3_OVR_SEL, 0);

sys/dev/drm/radeon/kv_dpm.c

420

WREG32_SMC(LCAC_MC3_OVR_VAL, 0);

sys/dev/drm/radeon/kv_dpm.c

423

WREG32_SMC(LCAC_CPL_OVR_SEL, 0);

sys/dev/drm/radeon/kv_dpm.c

424

WREG32_SMC(LCAC_CPL_OVR_VAL, 0);

sys/dev/drm/radeon/kv_dpm.c

522

WREG32_SMC(CG_FTV_0, 0x3FFFC100);

sys/dev/drm/radeon/kv_dpm.c

527

WREG32_SMC(CG_FTV_0, 0);

sys/dev/drm/radeon/kv_dpm.c

645

WREG32_SMC(GENERAL_PWRMGT, tmp);

sys/dev/drm/radeon/kv_dpm.c

662

WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);

sys/dev/drm/radeon/kv_dpm.c

671

WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);

sys/dev/drm/radeon/radeon.h

2586

WREG32_SMC(reg, tmp_); \

sys/dev/drm/radeon/si.c

5452

WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0);

sys/dev/drm/radeon/si.c

5453

WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0);

sys/dev/drm/radeon/si.c

5464

WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0xffffffff);

sys/dev/drm/radeon/si.c

5465

WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0xffffffff);

sys/dev/drm/radeon/si_dpm.c

2765

WREG32_SMC(offset, data);

sys/dev/drm/radeon/si_smc.c

119

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/si_smc.c

133

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/si_smc.c

149

WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

sys/dev/drm/radeon/si_smc.c

158

WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

sys/dev/drm/radeon/trinity_dpm.c

1018

WREG32_SMC(SMU_SCLK_DPM_TTT, value);

sys/dev/drm/radeon/trinity_dpm.c

1027

WREG32_SMC(SMU_SCLK_DPM_TT_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

1045

WREG32_SMC(PM_I_CNTL_1, value);

sys/dev/drm/radeon/trinity_dpm.c

1202

WREG32_SMC(NB_PSTATE_CONFIG, nbpsconfig);

sys/dev/drm/radeon/trinity_dpm.c

1652

WREG32_SMC(DC_CAC_VALUE, dc_cac_value);

sys/dev/drm/radeon/trinity_dpm.c

388

WREG32_SMC(GFX_POWER_GATING_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

512

WREG32_SMC(SMU_SCRATCH_A, (RREG32_SMC(SMU_SCRATCH_A) | 0x01));

sys/dev/drm/radeon/trinity_dpm.c

530

WREG32_SMC(PM_I_CNTL_1, value);

sys/dev/drm/radeon/trinity_dpm.c

535

WREG32_SMC(SMU_S_PG_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

539

WREG32_SMC(SMU_S_PG_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

543

WREG32_SMC(PM_I_CNTL_1, value);

sys/dev/drm/radeon/trinity_dpm.c

604

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

614

WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

626

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

638

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

651

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

656

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

668

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

680

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

692

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

704

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

716

WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

748

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

765

WREG32_SMC(SMU_SCLK_DPM_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

802

WREG32_SMC(SMU_SCLK_DPM_CNTL, sclk_dpm_cntl);

sys/dev/drm/radeon/trinity_dpm.c

883

WREG32_SMC(SMU_UVD_DPM_STATES, uvdstates);

sys/dev/drm/radeon/trinity_dpm.c

898

WREG32_SMC(SMU_UVD_DPM_CNTL, val);

sys/dev/drm/radeon/trinity_smc.c

67

WREG32_SMC(SMU_SCRATCH0, 1);

sys/dev/drm/radeon/trinity_smc.c

69

WREG32_SMC(SMU_SCRATCH0, 0);

sys/dev/drm/radeon/trinity_smc.c

76

WREG32_SMC(SMU_SCRATCH0, n);

sys/dev/drm/radeon/trinity_smc.c

83

WREG32_SMC(SMU_SCRATCH0, n);