sys/dev/drm/radeon/sumo_dpm.c

188

WREG32_RCU(RCU_PWR_GATING_SEQ0, 0x10103210);

sys/dev/drm/radeon/sumo_dpm.c

189

WREG32_RCU(RCU_PWR_GATING_SEQ1, 0x10101010);

sys/dev/drm/radeon/sumo_dpm.c

191

WREG32_RCU(RCU_PWR_GATING_SEQ0, 0x76543210);

sys/dev/drm/radeon/sumo_dpm.c

192

WREG32_RCU(RCU_PWR_GATING_SEQ1, 0xFEDCBA98);

sys/dev/drm/radeon/sumo_dpm.c

203

WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

208

WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

213

WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

218

WREG32_RCU(RCU_PWR_GATING_CNTL_4, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

221

WREG32_RCU(RCU_PWR_GATING_CNTL_5, 0xA02);

sys/dev/drm/radeon/sumo_dpm.c

233

WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

239

WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

244

WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

260

WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

266

WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_dpm.c

271

WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl);

sys/dev/drm/radeon/sumo_smc.c

123

WREG32_RCU(RCU_ALTVDDNB_NOTIFY, param);

sys/dev/drm/radeon/sumo_smc.c

157

WREG32_RCU(RCU_GNB_PWR_REP_TIMER_CNTL, timer_value);

sys/dev/drm/radeon/sumo_smc.c

158

WREG32_RCU(RCU_BOOST_MARGIN, pi->sys_info.sclk_dpm_boost_margin);

sys/dev/drm/radeon/sumo_smc.c

159

WREG32_RCU(RCU_THROTTLE_MARGIN, pi->sys_info.sclk_dpm_throttle_margin);

sys/dev/drm/radeon/sumo_smc.c

160

WREG32_RCU(GNB_TDP_LIMIT, pi->sys_info.gnb_tdp_limit);

sys/dev/drm/radeon/sumo_smc.c

161

WREG32_RCU(RCU_SclkDpmTdpLimitPG, pi->sys_info.sclk_dpm_tdp_limit_pg);

sys/dev/drm/radeon/sumo_smc.c

205

WREG32_RCU(regoffset, sclk_dpm_tdp_limit);

sys/dev/drm/radeon/sumo_smc.c

214

WREG32_RCU(RCU_GPU_BOOST_DISABLE, boost_disable);

sys/dev/drm/radeon/sumo_smc.c

81

WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4),

sys/dev/drm/radeon/sumo_smc.c

85

WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4),

sys/dev/drm/radeon/sumo_smc.c

89

WREG32_RCU(MCU_M3ARB_PARAMS + (i * 4),