Symbol: WREG32_PCIE
sys/dev/drm/amd/amdgpu/amdgpu_cgs.c
93
return WREG32_PCIE(index, value);
sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c
285
WREG32_PCIE(*pos >> 2, value);
sys/dev/drm/amd/amdgpu/cik.c
1457
WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, tmp);
sys/dev/drm/amd/amdgpu/cik.c
1475
WREG32_PCIE(ixPCIE_LC_CNTL4, tmp);
sys/dev/drm/amd/amdgpu/cik.c
1479
WREG32_PCIE(ixPCIE_LC_CNTL4, tmp);
sys/dev/drm/amd/amdgpu/cik.c
1507
WREG32_PCIE(ixPCIE_LC_CNTL4, tmp);
sys/dev/drm/amd/amdgpu/cik.c
1516
WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
sys/dev/drm/amd/amdgpu/cik.c
1530
WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
sys/dev/drm/amd/amdgpu/cik.c
1563
WREG32_PCIE(ixPCIE_LC_N_FTS_CNTL, data);
sys/dev/drm/amd/amdgpu/cik.c
1568
WREG32_PCIE(ixPCIE_LC_CNTL3, data);
sys/dev/drm/amd/amdgpu/cik.c
1573
WREG32_PCIE(ixPCIE_P_CNTL, data);
sys/dev/drm/amd/amdgpu/cik.c
1586
WREG32_PCIE(ixPCIE_LC_CNTL, data);
sys/dev/drm/amd/amdgpu/cik.c
1597
WREG32_PCIE(ixPB0_PIF_PWRDOWN_0, data);
sys/dev/drm/amd/amdgpu/cik.c
1605
WREG32_PCIE(ixPB0_PIF_PWRDOWN_1, data);
sys/dev/drm/amd/amdgpu/cik.c
1613
WREG32_PCIE(ixPB1_PIF_PWRDOWN_0, data);
sys/dev/drm/amd/amdgpu/cik.c
1621
WREG32_PCIE(ixPB1_PIF_PWRDOWN_1, data);
sys/dev/drm/amd/amdgpu/cik.c
1627
WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, data);
sys/dev/drm/amd/amdgpu/cik.c
1646
WREG32_PCIE(ixPCIE_LC_CNTL2, data);
sys/dev/drm/amd/amdgpu/cik.c
1683
WREG32_PCIE(ixPCIE_LC_CNTL, data);
sys/dev/drm/amd/amdgpu/cik.c
1691
WREG32_PCIE(ixPCIE_CNTL2, data);
sys/dev/drm/amd/amdgpu/cik.c
1703
WREG32_PCIE(ixPCIE_LC_CNTL, data);
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
874
WREG32_PCIE(ixPCIE_CNTL2, data);
sys/dev/drm/amd/amdgpu/nbio_v6_1.c
172
WREG32_PCIE(smnCPM_CONTROL, data);
sys/dev/drm/amd/amdgpu/nbio_v6_1.c
192
WREG32_PCIE(smnPCIE_CNTL2, data);
sys/dev/drm/amd/amdgpu/nbio_v6_1.c
272
WREG32_PCIE(smnPCIE_CONFIG_CNTL, data);
sys/dev/drm/amd/amdgpu/nbio_v7_0.c
145
WREG32_PCIE(smnNBIF_MGCG_CTRL_LCLK, data);
sys/dev/drm/amd/amdgpu/nbio_v7_0.c
187
WREG32_PCIE(smnPCIE_CNTL2, data);
sys/dev/drm/amd/amdgpu/nbio_v7_4.c
149
WREG32_PCIE(smnPCIE_CNTL2, data);
sys/dev/drm/amd/amdgpu/vi.c
1289
WREG32_PCIE(ixPCIE_CNTL2, data);
sys/dev/drm/radeon/r300.c
158
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
sys/dev/drm/radeon/r300.c
159
WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_start);
sys/dev/drm/radeon/r300.c
161
WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp);
sys/dev/drm/radeon/r300.c
162
WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0);
sys/dev/drm/radeon/r300.c
163
WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0);
sys/dev/drm/radeon/r300.c
165
WREG32_PCIE(RADEON_PCIE_TX_GART_BASE, table_addr);
sys/dev/drm/radeon/r300.c
167
WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO, rdev->mc.vram_start);
sys/dev/drm/radeon/r300.c
168
WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_HI, 0);
sys/dev/drm/radeon/r300.c
170
WREG32_PCIE(RADEON_PCIE_TX_GART_ERROR, 0);
sys/dev/drm/radeon/r300.c
174
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
sys/dev/drm/radeon/r300.c
187
WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, 0);
sys/dev/drm/radeon/r300.c
188
WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, 0);
sys/dev/drm/radeon/r300.c
189
WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0);
sys/dev/drm/radeon/r300.c
190
WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0);
sys/dev/drm/radeon/r300.c
193
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN);
sys/dev/drm/radeon/r300.c
540
WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
sys/dev/drm/radeon/r300.c
541
WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, (link_width_cntl |
sys/dev/drm/radeon/r300.c
86
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp | RADEON_PCIE_TX_GART_INVALIDATE_TLB);
sys/dev/drm/radeon/r300.c
88
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
sys/dev/drm/radeon/rv6xx_dpm.c
136
WREG32_PCIE(PCIE_P_CNTL, tmp);
sys/dev/drm/radeon/rv770_dpm.c
131
WREG32_PCIE(PCIE_P_CNTL, tmp);
sys/dev/drm/radeon/si.c
5568
WREG32_PCIE(PCIE_CNTL2, data);
sys/dev/drm/radeon/si.c
7273
WREG32_PCIE(PCIE_P_CNTL, data);
sys/dev/drm/radeon/si.c
7440
WREG32_PCIE(PCIE_CNTL2, data);