WREG32_MC
WREG32_MC(R_000004_MC_FB_LOCATION,
WREG32_MC(R_000005_MC_AGP_LOCATION,
WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
WREG32_MC(R_000007_AGP_BASE_2,
WREG32_MC(R_000005_MC_AGP_LOCATION, 0xFFFFFFFF);
WREG32_MC(R_000006_AGP_BASE, 0);
WREG32_MC(R_000007_AGP_BASE_2, 0);
WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp);
WREG32_MC(RS690_MCCFG_AGP_BASE, 0xFFFFFFFF);
WREG32_MC(RS690_MCCFG_AGP_BASE_2, 0);
WREG32_MC(RS690_MCCFG_AGP_LOCATION, tmp);
WREG32_MC(RS480_GART_BASE, tmp);
WREG32_MC(RS480_GART_FEATURE_ID,
WREG32_MC(RS480_AGP_MODE_CNTL,
WREG32_MC(RS480_MC_MISC_CNTL, tmp);
WREG32_MC(RS480_MC_MISC_CNTL, tmp);
WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | size_reg));
WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp);
WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, 0);
WREG32_MC(RS480_GART_CACHE_CNTRL, RS480_GART_CACHE_INVALIDATE);
WREG32_MC(RS480_GART_CACHE_CNTRL, 0);
WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
WREG32_MC(R_000100_MC_PT0_CNTL,
WREG32_MC(R_00016C_MC_PT0_CLIENT0_CNTL + i,
WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL,
WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL + i, 0);
WREG32_MC(R_00012C_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,
WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);
WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);
WREG32_MC(R_00011C_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);
WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);
WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);
WREG32_MC(R_000100_MC_PT0_CNTL, (tmp | S_000100_ENABLE_PT(1)));
WREG32_MC(R_000009_MC_CNTL1, (tmp | S_000009_ENABLE_PAGE_TABLES(1)));
WREG32_MC(R_000100_MC_PT0_CNTL, 0);
WREG32_MC(R_000009_MC_CNTL1, tmp & C_000009_ENABLE_PAGE_TABLES);
WREG32_MC(R_000005_MC_AGP_LOCATION, 0x0FFFFFFF);
WREG32_MC(R_000006_AGP_BASE, 0);
WREG32_MC(R_000007_AGP_BASE_2, 0);
WREG32_MC(R_000004_MC_FB_LOCATION,
WREG32_MC(R_000104_MC_INIT_MISC_LAT_TIMER, tmp);
WREG32_MC(R_000100_MCCFG_FB_LOCATION,
WREG32_MC(MC_MISC_LAT_TIMER, tmp);
WREG32_MC(R_000001_MC_FB_LOCATION,
WREG32_MC(R_000002_MC_AGP_LOCATION,
WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
WREG32_MC(R_000004_MC_AGP_BASE_2,
WREG32_MC(R_000002_MC_AGP_LOCATION, 0xFFFFFFFF);
WREG32_MC(R_000003_MC_AGP_BASE, 0);
WREG32_MC(R_000004_MC_AGP_BASE_2, 0);