Symbol: UCHAR
bin/ps/print.c
688
case UCHAR:
sys/dev/drm/amd/include/atombios.h
1003
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/amd/include/atombios.h
1004
UCHAR ucBitPerColor; // only valid for DP mode when ucAction = ATOM_ENCODER_CMD_SETUP
sys/dev/drm/amd/include/atombios.h
1005
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
1015
UCHAR ucReserved1:1;
sys/dev/drm/amd/include/atombios.h
1016
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/amd/include/atombios.h
1017
UCHAR ucReserved:2;
sys/dev/drm/amd/include/atombios.h
1018
UCHAR ucDPLinkRate:2; // =0: 1.62Ghz, =1: 2.7Ghz, 2=5.4Ghz <= Changed comparing to previous version
sys/dev/drm/amd/include/atombios.h
1020
UCHAR ucDPLinkRate:2; // =0: 1.62Ghz, =1: 2.7Ghz, 2=5.4Ghz <= Changed comparing to previous version
sys/dev/drm/amd/include/atombios.h
1021
UCHAR ucReserved:2;
sys/dev/drm/amd/include/atombios.h
1022
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/amd/include/atombios.h
1023
UCHAR ucReserved1:1;
sys/dev/drm/amd/include/atombios.h
1046
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
1048
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
1050
UCHAR ucEncoderMode;
sys/dev/drm/amd/include/atombios.h
1057
UCHAR ucPanelMode; // only valid when ucAction == ATOM_ENCODER_CMD_SETUP_PANEL_MODE
sys/dev/drm/amd/include/atombios.h
1062
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/amd/include/atombios.h
1063
UCHAR ucBitPerColor; // only valid for DP mode when ucAction = ATOM_ENCODER_CMD_SETUP
sys/dev/drm/amd/include/atombios.h
1064
UCHAR ucHPD_ID; // HPD ID (1-6). =0 means to skip HDP programming. New comparing to previous version
sys/dev/drm/amd/include/atombios.h
1083
UCHAR ucDigId; // 0~6 map to DIG0~DIG6
sys/dev/drm/amd/include/atombios.h
1084
UCHAR ucAction; // = ATOM_ENOCODER_CMD_STREAM_SETUP
sys/dev/drm/amd/include/atombios.h
1085
UCHAR ucDigMode; // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI
sys/dev/drm/amd/include/atombios.h
1086
UCHAR ucLaneNum; // Lane number
sys/dev/drm/amd/include/atombios.h
1088
UCHAR ucBitPerColor;
sys/dev/drm/amd/include/atombios.h
1089
UCHAR ucLinkRateIn270Mhz;//= DP link rate/270Mhz, =6: 1.62G = 10: 2.7G, =20: 5.4Ghz, =30: 8.1Ghz etc
sys/dev/drm/amd/include/atombios.h
1090
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
1095
UCHAR ucDigId; // 0~6 map to DIG0~DIG6
sys/dev/drm/amd/include/atombios.h
1096
UCHAR ucAction; // = ATOM_ENOCODER_CMD_LINK_SETUP
sys/dev/drm/amd/include/atombios.h
1097
UCHAR ucDigMode; // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI
sys/dev/drm/amd/include/atombios.h
1098
UCHAR ucLaneNum; // Lane number
sys/dev/drm/amd/include/atombios.h
1100
UCHAR ucHPDSel;
sys/dev/drm/amd/include/atombios.h
1101
UCHAR ucDigEncoderSel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable,
sys/dev/drm/amd/include/atombios.h
1102
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
1107
UCHAR ucDigId; // 0~6 map to DIG0~DIG6
sys/dev/drm/amd/include/atombios.h
1108
UCHAR ucAction; // = ATOM_ENCODER_CMD_DPLINK_SETUP
sys/dev/drm/amd/include/atombios.h
1109
UCHAR ucPanelMode; // =0: external DP
sys/dev/drm/amd/include/atombios.h
1112
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
1118
UCHAR ucDigId; // 0~6 map to DIG0~DIG6
sys/dev/drm/amd/include/atombios.h
1119
UCHAR ucAction; // = rest of generic encoder command which does not carry any parameters
sys/dev/drm/amd/include/atombios.h
1120
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
1150
UCHAR ucLaneSel;
sys/dev/drm/amd/include/atombios.h
1151
UCHAR ucLaneSet;
sys/dev/drm/amd/include/atombios.h
1162
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
1176
UCHAR ucAction; // =0: turn off encoder
sys/dev/drm/amd/include/atombios.h
1178
UCHAR ucReserved[4];
sys/dev/drm/amd/include/atombios.h
1231
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/amd/include/atombios.h
1234
UCHAR ucReserved:1;
sys/dev/drm/amd/include/atombios.h
1235
UCHAR fDPConnector:1; //bit4=0: DP connector =1: None DP connector
sys/dev/drm/amd/include/atombios.h
1236
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 )
sys/dev/drm/amd/include/atombios.h
1237
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/amd/include/atombios.h
1240
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/amd/include/atombios.h
1241
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/amd/include/atombios.h
1243
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/amd/include/atombios.h
1244
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/amd/include/atombios.h
1245
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/amd/include/atombios.h
1247
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 )
sys/dev/drm/amd/include/atombios.h
1248
UCHAR fDPConnector:1; //bit4=0: DP connector =1: None DP connector
sys/dev/drm/amd/include/atombios.h
1249
UCHAR ucReserved:1;
sys/dev/drm/amd/include/atombios.h
1250
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/amd/include/atombios.h
1291
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX
sys/dev/drm/amd/include/atombios.h
1292
UCHAR ucReserved[4];
sys/dev/drm/amd/include/atombios.h
1298
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/amd/include/atombios.h
1301
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2
sys/dev/drm/amd/include/atombios.h
1302
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/amd/include/atombios.h
1303
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/amd/include/atombios.h
1305
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/amd/include/atombios.h
1306
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/amd/include/atombios.h
1308
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/amd/include/atombios.h
1309
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/amd/include/atombios.h
1310
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/amd/include/atombios.h
1312
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/amd/include/atombios.h
1313
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2
sys/dev/drm/amd/include/atombios.h
1314
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/amd/include/atombios.h
1330
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX
sys/dev/drm/amd/include/atombios.h
1331
UCHAR ucLaneNum;
sys/dev/drm/amd/include/atombios.h
1332
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
1373
UCHAR ucLaneSel;
sys/dev/drm/amd/include/atombios.h
1376
UCHAR ucLaneSet;
sys/dev/drm/amd/include/atombios.h
1379
UCHAR ucPOST_CURSOR2:2; //Bit[7:6] Post Cursor2 Level <= New in V4
sys/dev/drm/amd/include/atombios.h
1380
UCHAR ucPRE_EMPHASIS:3; //Bit[5:3] Pre-emphasis Level
sys/dev/drm/amd/include/atombios.h
1381
UCHAR ucVOLTAGE_SWING:3; //Bit[2:0] Voltage Swing Level
sys/dev/drm/amd/include/atombios.h
1383
UCHAR ucVOLTAGE_SWING:3; //Bit[2:0] Voltage Swing Level
sys/dev/drm/amd/include/atombios.h
1384
UCHAR ucPRE_EMPHASIS:3; //Bit[5:3] Pre-emphasis Level
sys/dev/drm/amd/include/atombios.h
1385
UCHAR ucPOST_CURSOR2:2; //Bit[7:6] Post Cursor2 Level <= New in V4
sys/dev/drm/amd/include/atombios.h
1394
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/amd/include/atombios.h
1397
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New
sys/dev/drm/amd/include/atombios.h
1398
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/amd/include/atombios.h
1399
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/amd/include/atombios.h
1401
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/amd/include/atombios.h
1402
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/amd/include/atombios.h
1404
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/amd/include/atombios.h
1405
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/amd/include/atombios.h
1406
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/amd/include/atombios.h
1408
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/amd/include/atombios.h
1409
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New
sys/dev/drm/amd/include/atombios.h
1410
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/amd/include/atombios.h
1427
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
1429
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX
sys/dev/drm/amd/include/atombios.h
1430
UCHAR ucLaneNum;
sys/dev/drm/amd/include/atombios.h
1431
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
1463
UCHAR ucReservd1:1;
sys/dev/drm/amd/include/atombios.h
1464
UCHAR ucHPDSel:3;
sys/dev/drm/amd/include/atombios.h
1465
UCHAR ucPhyClkSrcId:2;
sys/dev/drm/amd/include/atombios.h
1466
UCHAR ucCoherentMode:1;
sys/dev/drm/amd/include/atombios.h
1467
UCHAR ucReserved:1;
sys/dev/drm/amd/include/atombios.h
1469
UCHAR ucReserved:1;
sys/dev/drm/amd/include/atombios.h
1470
UCHAR ucCoherentMode:1;
sys/dev/drm/amd/include/atombios.h
1471
UCHAR ucPhyClkSrcId:2;
sys/dev/drm/amd/include/atombios.h
1472
UCHAR ucHPDSel:3;
sys/dev/drm/amd/include/atombios.h
1473
UCHAR ucReservd1:1;
sys/dev/drm/amd/include/atombios.h
1480
UCHAR ucPhyId; // 0=UNIPHYA, 1=UNIPHYB, 2=UNIPHYC, 3=UNIPHYD, 4= UNIPHYE 5=UNIPHYF
sys/dev/drm/amd/include/atombios.h
1481
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_xxx
sys/dev/drm/amd/include/atombios.h
1482
UCHAR ucLaneNum; // indicate lane number 1-8
sys/dev/drm/amd/include/atombios.h
1483
UCHAR ucConnObjId; // Connector Object Id defined in ObjectId.h
sys/dev/drm/amd/include/atombios.h
1484
UCHAR ucDigMode; // indicate DIG mode
sys/dev/drm/amd/include/atombios.h
1487
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
1489
UCHAR ucDigEncoderSel; // indicate DIG front end encoder
sys/dev/drm/amd/include/atombios.h
1490
UCHAR ucDPLaneSet;
sys/dev/drm/amd/include/atombios.h
1491
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
1492
UCHAR ucReserved1;
sys/dev/drm/amd/include/atombios.h
1561
UCHAR ucPhyId; // 0=UNIPHYA, 1=UNIPHYB, 2=UNIPHYC, 3=UNIPHYD, 4= UNIPHYE 5=UNIPHYF
sys/dev/drm/amd/include/atombios.h
1562
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_xxx
sys/dev/drm/amd/include/atombios.h
1565
UCHAR ucDigMode; // ATOM_ENCODER_MODE_DP/ATOM_ENCODER_MODE_DVI/ATOM_ENCODER_MODE_HDMI
sys/dev/drm/amd/include/atombios.h
1566
UCHAR ucDPLaneSet; // DP voltage swing and pre-emphasis value defined in DPCD DP_LANE_SET, "DP_LANE_SET__xDB_y_zV"
sys/dev/drm/amd/include/atombios.h
1568
UCHAR ucLaneNum; // Lane number
sys/dev/drm/amd/include/atombios.h
1570
UCHAR ucHPDSel; // =1: HPD1, =2: HPD2, .... =6: HPD6, =0: HPD is not assigned
sys/dev/drm/amd/include/atombios.h
1571
UCHAR ucDigEncoderSel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable,
sys/dev/drm/amd/include/atombios.h
1572
UCHAR ucConnObjId; // Connector Object Id defined in ObjectId.h
sys/dev/drm/amd/include/atombios.h
1573
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
1616
UCHAR ucConfig; // indicate which encoder, and DP link rate when ucAction = SETUP/ENABLE_OUTPUT
sys/dev/drm/amd/include/atombios.h
1617
UCHAR ucAction; //
sys/dev/drm/amd/include/atombios.h
1618
UCHAR ucEncoderMode; // encoder mode, only used when ucAction = SETUP/ENABLE_OUTPUT
sys/dev/drm/amd/include/atombios.h
1619
UCHAR ucLaneNum; // lane number, only used when ucAction = SETUP/ENABLE_OUTPUT
sys/dev/drm/amd/include/atombios.h
1620
UCHAR ucBitPerColor; // output bit per color, only valid when ucAction = SETUP/ENABLE_OUTPUT and ucEncodeMode= DP
sys/dev/drm/amd/include/atombios.h
1621
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
1659
UCHAR ucAction; // Possible input:ATOM_ENABLE||ATOMDISABLE
sys/dev/drm/amd/include/atombios.h
1664
UCHAR aucPadding[3]; // padding to DWORD aligned
sys/dev/drm/amd/include/atombios.h
1704
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
1705
UCHAR ucBriLevel;
sys/dev/drm/amd/include/atombios.h
1716
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1717
UCHAR ucBlanking; // ATOM_BLANKING or ATOM_BLANKINGOFF
sys/dev/drm/amd/include/atombios.h
1731
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1732
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
1733
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
1746
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1747
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
1756
UCHAR ucH_Replication; // horizontal replication
sys/dev/drm/amd/include/atombios.h
1757
UCHAR ucV_Replication; // vertical replication
sys/dev/drm/amd/include/atombios.h
1758
UCHAR usCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1759
UCHAR ucPadding;
sys/dev/drm/amd/include/atombios.h
1768
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1769
UCHAR ucDevice; // ATOM_DEVICE_CRT1|ATOM_DEVICE_CRT2|....
sys/dev/drm/amd/include/atombios.h
1770
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
1776
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1777
UCHAR ucEncoderID; // DAC1/DAC2/TVOUT/DIG1/DIG2/DVO
sys/dev/drm/amd/include/atombios.h
1778
UCHAR ucEncodeMode; // Encoding mode, only valid when using DIG1/DIG2/DVO
sys/dev/drm/amd/include/atombios.h
1779
UCHAR ucPadding;
sys/dev/drm/amd/include/atombios.h
1805
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
1806
UCHAR ucEncoderID; // DAC1/DAC2/TVOUT/DIG1/DIG2/DVO
sys/dev/drm/amd/include/atombios.h
1807
UCHAR ucEncodeMode; // Encoding mode, only valid when using DIG1/DIG2/DVO
sys/dev/drm/amd/include/atombios.h
1808
UCHAR ucDstBpc; // PANEL_6/8/10/12BIT_PER_COLOR
sys/dev/drm/amd/include/atombios.h
1823
UCHAR ucPostDiv; // post divider
sys/dev/drm/amd/include/atombios.h
1824
UCHAR ucFracFbDiv; // fractional feedback divider
sys/dev/drm/amd/include/atombios.h
1825
UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2
sys/dev/drm/amd/include/atombios.h
1826
UCHAR ucRefDivSrc; // ATOM_PJITTER or ATO_NONPJITTER
sys/dev/drm/amd/include/atombios.h
1827
UCHAR ucCRTC; // Which CRTC uses this Ppll
sys/dev/drm/amd/include/atombios.h
1828
UCHAR ucPadding;
sys/dev/drm/amd/include/atombios.h
1843
UCHAR ucPostDiv; // post divider
sys/dev/drm/amd/include/atombios.h
1844
UCHAR ucFracFbDiv; // fractional feedback divider
sys/dev/drm/amd/include/atombios.h
1845
UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2
sys/dev/drm/amd/include/atombios.h
1846
UCHAR ucRefDivSrc; // ATOM_PJITTER or ATO_NONPJITTER
sys/dev/drm/amd/include/atombios.h
1847
UCHAR ucCRTC; // Which CRTC uses this Ppll
sys/dev/drm/amd/include/atombios.h
1848
UCHAR ucMiscInfo; // Different bits for different purpose, bit [7:4] as device index, bit[0]=Force prog
sys/dev/drm/amd/include/atombios.h
1890
UCHAR ucPostDiv; // post divider
sys/dev/drm/amd/include/atombios.h
1891
UCHAR ucFracFbDiv; // fractional feedback divider
sys/dev/drm/amd/include/atombios.h
1892
UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2
sys/dev/drm/amd/include/atombios.h
1893
UCHAR ucTransmitterId; // graphic encoder id defined in objectId.h
sys/dev/drm/amd/include/atombios.h
1896
UCHAR ucEncoderMode; // encoder type defined as ATOM_ENCODER_MODE_DP/DVI/HDMI/
sys/dev/drm/amd/include/atombios.h
1897
UCHAR ucDVOConfig; // when use DVO, need to know SDR/DDR, 12bit or 24bit
sys/dev/drm/amd/include/atombios.h
1899
UCHAR ucMiscInfo; // bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC sel
sys/dev/drm/amd/include/atombios.h
1910
UCHAR ucCRTC; // ATOM_CRTC1~6, indicate the CRTC controller to
sys/dev/drm/amd/include/atombios.h
1913
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
1914
UCHAR ucFracFbDiv; // [gphan] temporary to prevent build problem. remove it after driver code is changed.
sys/dev/drm/amd/include/atombios.h
1919
UCHAR ucPostDiv; // post divider.
sys/dev/drm/amd/include/atombios.h
1920
UCHAR ucRefDiv; // Reference divider
sys/dev/drm/amd/include/atombios.h
1921
UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2/ATOM_DCPLL
sys/dev/drm/amd/include/atombios.h
1922
UCHAR ucTransmitterID; // ASIC encoder id defined in objectId.h,
sys/dev/drm/amd/include/atombios.h
1924
UCHAR ucEncoderMode; // Encoder mode:
sys/dev/drm/amd/include/atombios.h
1925
UCHAR ucMiscInfo; // bit[0]= Force program PPLL
sys/dev/drm/amd/include/atombios.h
1967
UCHAR ucPostDiv; // post divider.
sys/dev/drm/amd/include/atombios.h
1968
UCHAR ucRefDiv; // Reference divider
sys/dev/drm/amd/include/atombios.h
1969
UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2/ATOM_DCPLL
sys/dev/drm/amd/include/atombios.h
1970
UCHAR ucTransmitterID; // ASIC encoder id defined in objectId.h,
sys/dev/drm/amd/include/atombios.h
1972
UCHAR ucEncoderMode; // Encoder mode:
sys/dev/drm/amd/include/atombios.h
1973
UCHAR ucMiscInfo; // bit[0]= Force program PPLL
sys/dev/drm/amd/include/atombios.h
2005
UCHAR ucStatus;
sys/dev/drm/amd/include/atombios.h
2006
UCHAR ucRefDivSrc; // =1: reference clock source from XTALIN, =0: source from PCIE ref clock
sys/dev/drm/amd/include/atombios.h
2007
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
2019
UCHAR ucPpll; // ATOM_PHY_PLL0/ATOM_PHY_PLL1/ATOM_PPLL0
sys/dev/drm/amd/include/atombios.h
2020
UCHAR ucTransmitterID; // ASIC encoder id defined in objectId.h,
sys/dev/drm/amd/include/atombios.h
2022
UCHAR ucEncoderMode; // Encoder mode:
sys/dev/drm/amd/include/atombios.h
2023
UCHAR ucMiscInfo; // bit[0]= Force program PLL for pixclk
sys/dev/drm/amd/include/atombios.h
2029
UCHAR ucCRTC; // ATOM_CRTC1~6, indicate the CRTC controller to
sys/dev/drm/amd/include/atombios.h
2030
UCHAR ucDeepColorRatio; // HDMI panel bit depth: =0: 24bpp =1:30bpp, =2:36bpp
sys/dev/drm/amd/include/atombios.h
2031
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
2055
UCHAR ucFlag; // bit0=1: DPREFCLK bypass DFS bit0=0: DPREFCLK not bypass DFS
sys/dev/drm/amd/include/atombios.h
2056
UCHAR ucCrtc; // use when enable DCCG pixel clock ucFlag[1]=1
sys/dev/drm/amd/include/atombios.h
2057
UCHAR ucPpllId; // use when enable DCCG pixel clock ucFlag[1]=1
sys/dev/drm/amd/include/atombios.h
2058
UCHAR ucDeepColorRatio; // use when enable DCCG pixel clock ucFlag[1]=1
sys/dev/drm/amd/include/atombios.h
2077
UCHAR ucDCEClkType; // =0: DISPCLK =1: DPREFCLK =2: PIXCLK
sys/dev/drm/amd/include/atombios.h
2078
UCHAR ucDCEClkSrc; // ATOM_PLL0 or ATOM_GCK_DFS or ATOM_FCH_CLK or ATOM_COMBOPHY_PLLx
sys/dev/drm/amd/include/atombios.h
2079
UCHAR ucDCEClkFlag; // Bit [1:0] = PPLL ref clock source ( when ucDCEClkSrc= ATOM_PPLL0 )
sys/dev/drm/amd/include/atombios.h
2080
UCHAR ucCRTC; // ucDisp Pipe Id, ATOM_CRTC0/1/2/..., use only when ucDCEClkType = PIXCLK
sys/dev/drm/amd/include/atombios.h
211
UCHAR ucTableFormatRevision; //Change it when the Parser is not backward compatible
sys/dev/drm/amd/include/atombios.h
2117
UCHAR ucTransmitterID;
sys/dev/drm/amd/include/atombios.h
2118
UCHAR ucEncodeMode;
sys/dev/drm/amd/include/atombios.h
212
UCHAR ucTableContentRevision; //Change it only when the table needs to change but the firmware
sys/dev/drm/amd/include/atombios.h
2121
UCHAR ucDVOConfig; //if DVO, need passing link rate and output 12bitlow or 24bit
sys/dev/drm/amd/include/atombios.h
2122
UCHAR ucConfig; //if none DVO, not defined yet
sys/dev/drm/amd/include/atombios.h
2124
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
2133
UCHAR ucTransmitterID; // GPU transmitter id defined in objectid.h
sys/dev/drm/amd/include/atombios.h
2134
UCHAR ucEncodeMode; // encoder mode: CRT, LVDS, DP, TMDS or HDMI
sys/dev/drm/amd/include/atombios.h
2135
UCHAR ucDispPllConfig; // display pll configure parameter defined as following DISPPLL_CONFIG_XXXX
sys/dev/drm/amd/include/atombios.h
2136
UCHAR ucExtTransmitterID; // external encoder id.
sys/dev/drm/amd/include/atombios.h
2137
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
2156
UCHAR ucRefDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider and post_div ( if it is not given )
sys/dev/drm/amd/include/atombios.h
2157
UCHAR ucPostDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider
sys/dev/drm/amd/include/atombios.h
2158
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
2175
UCHAR ucEnable; // ATOM_ENABLE:Enable YUV or ATOM_DISABLE:Disable YUV (RGB)
sys/dev/drm/amd/include/atombios.h
2176
UCHAR ucCRTC; // Which CRTC needs this YUV or RGB format
sys/dev/drm/amd/include/atombios.h
2177
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
2210
UCHAR ucSlaveAddr; //Read from which slave
sys/dev/drm/amd/include/atombios.h
2211
UCHAR ucLineNumber; //Read from which HW assisted line
sys/dev/drm/amd/include/atombios.h
222
UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
sys/dev/drm/amd/include/atombios.h
2232
UCHAR ucData; //PS data1
sys/dev/drm/amd/include/atombios.h
2233
UCHAR ucStatus; //Status byte 1=success, 2=failure, Also is used as PS data2
sys/dev/drm/amd/include/atombios.h
2234
UCHAR ucSlaveAddr; //Write to which slave
sys/dev/drm/amd/include/atombios.h
2235
UCHAR ucLineNumber; //Write from which HW assisted line
sys/dev/drm/amd/include/atombios.h
2243
UCHAR ucSlaveAddr; //Write to which slave
sys/dev/drm/amd/include/atombios.h
2244
UCHAR ucLineNumber; //Write from which HW assisted line
sys/dev/drm/amd/include/atombios.h
2256
UCHAR ucPowerConnectorStatus; //Used for return value 0: detected, 1:not detected
sys/dev/drm/amd/include/atombios.h
2257
UCHAR ucPwrBehaviorId;
sys/dev/drm/amd/include/atombios.h
2263
UCHAR ucPowerConnectorStatus; //Used for return value 0: detected, 1:not detected
sys/dev/drm/amd/include/atombios.h
2264
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
2278
UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD
sys/dev/drm/amd/include/atombios.h
2279
UCHAR ucSpreadSpectrumStepSize_Delay; //bits3:2 SS_STEP_SIZE; bit 6:4 SS_DELAY
sys/dev/drm/amd/include/atombios.h
2280
UCHAR ucEnable; //ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
2281
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
2288
UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD
sys/dev/drm/amd/include/atombios.h
2289
UCHAR ucSpreadSpectrumStep; //
sys/dev/drm/amd/include/atombios.h
2290
UCHAR ucEnable; //ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
2291
UCHAR ucSpreadSpectrumDelay;
sys/dev/drm/amd/include/atombios.h
2292
UCHAR ucSpreadSpectrumRange;
sys/dev/drm/amd/include/atombios.h
2293
UCHAR ucPadding;
sys/dev/drm/amd/include/atombios.h
2300
UCHAR ucSpreadSpectrumType; // Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD
sys/dev/drm/amd/include/atombios.h
2301
UCHAR ucSpreadSpectrumStep; //
sys/dev/drm/amd/include/atombios.h
2302
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
2303
UCHAR ucSpreadSpectrumDelay;
sys/dev/drm/amd/include/atombios.h
2304
UCHAR ucSpreadSpectrumRange;
sys/dev/drm/amd/include/atombios.h
2305
UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2
sys/dev/drm/amd/include/atombios.h
2311
UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread.
sys/dev/drm/amd/include/atombios.h
2315
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
2336
UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread.
sys/dev/drm/amd/include/atombios.h
2340
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
237
UCHAR ucExtendedFunctionCode;
sys/dev/drm/amd/include/atombios.h
238
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
2403
UCHAR ucMisc; // bit0=0: Enable single link
sys/dev/drm/amd/include/atombios.h
2407
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/amd/include/atombios.h
2423
UCHAR ucMisc; // see PANEL_ENCODER_MISC_xx defintions below
sys/dev/drm/amd/include/atombios.h
2424
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/amd/include/atombios.h
2426
UCHAR ucTruncate; // bit0=0: Disable truncate
sys/dev/drm/amd/include/atombios.h
2430
UCHAR ucSpatial; // bit0=0: Disable spatial dithering
sys/dev/drm/amd/include/atombios.h
2434
UCHAR ucTemporal; // bit0=0: Disable temporal dithering
sys/dev/drm/amd/include/atombios.h
2440
UCHAR ucFRC; // bit4=0: 25FRC_SEL pattern E
sys/dev/drm/amd/include/atombios.h
245
UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
sys/dev/drm/amd/include/atombios.h
2473
UCHAR ucEnable; // Enable or Disable External TMDS encoder
sys/dev/drm/amd/include/atombios.h
2474
UCHAR ucMisc; // Bit0=0:Enable Single link;=1:Enable Dual link;Bit1 {=0:666RGB, =1:888RGB}
sys/dev/drm/amd/include/atombios.h
2475
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
2513
UCHAR ucDVOConfig;
sys/dev/drm/amd/include/atombios.h
2514
UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT
sys/dev/drm/amd/include/atombios.h
2515
UCHAR ucReseved[4];
sys/dev/drm/amd/include/atombios.h
2522
UCHAR ucDVOConfig;
sys/dev/drm/amd/include/atombios.h
2523
UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT
sys/dev/drm/amd/include/atombios.h
2524
UCHAR ucBitPerColor; //please refer to definition of PANEL_xBIT_PER_COLOR
sys/dev/drm/amd/include/atombios.h
2525
UCHAR ucReseved[3];
sys/dev/drm/amd/include/atombios.h
2598
UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ
sys/dev/drm/amd/include/atombios.h
2599
UCHAR ucVoltageMode; // To set all, to set source A or source B or ...
sys/dev/drm/amd/include/atombios.h
260
UCHAR ucExtendedFunctionCode;
sys/dev/drm/amd/include/atombios.h
2600
UCHAR ucVoltageIndex; // An index to tell which voltage level
sys/dev/drm/amd/include/atombios.h
2601
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
2606
UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ
sys/dev/drm/amd/include/atombios.h
2607
UCHAR ucVoltageMode; // Not used, maybe use for state machine for differen power mode
sys/dev/drm/amd/include/atombios.h
261
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
2614
UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/amd/include/atombios.h
2615
UCHAR ucVoltageMode; // Indicate action: Set voltage level
sys/dev/drm/amd/include/atombios.h
2670
UCHAR ucVoltageType; // Input: To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/amd/include/atombios.h
2671
UCHAR ucVoltageMode; // Input: Indicate action: Get voltage info
sys/dev/drm/amd/include/atombios.h
2709
UCHAR ucVoltageType; // Input: To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/amd/include/atombios.h
2710
UCHAR ucVoltageMode; // Input: Indicate action: Get voltage info
sys/dev/drm/amd/include/atombios.h
2731
UCHAR ucVoltageType; // Input: To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/amd/include/atombios.h
2732
UCHAR ucVoltageMode; // Input: Indicate action: Get voltage info
sys/dev/drm/amd/include/atombios.h
2766
UCHAR ucTvStandard; // See definition "ATOM_TV_NTSC ..."
sys/dev/drm/amd/include/atombios.h
2767
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/amd/include/atombios.h
2843
UCHAR ucI2C_Type; // I2C type (normal GP_IO, ImpactTV GP_IO, Dedicated I2C pin, etc)
sys/dev/drm/amd/include/atombios.h
2844
UCHAR ucTV_OutInfo; // Type of TV out supported (3:0) and video out crystal frequency (6:4) and TV data port (7)
sys/dev/drm/amd/include/atombios.h
2845
UCHAR ucVideoPortInfo; // Provides the video port capabilities
sys/dev/drm/amd/include/atombios.h
2846
UCHAR ucHostPortInfo; // Provides host port configuration information
sys/dev/drm/amd/include/atombios.h
2857
UCHAR ucTunerInfo; // Type of tuner installed on the adapter (4:0) and video input for tuner (7:5)
sys/dev/drm/amd/include/atombios.h
2858
UCHAR ucAudioChipInfo; // List the audio chip type (3:0) product type (4) and OEM revision (7:5)
sys/dev/drm/amd/include/atombios.h
2859
UCHAR ucProductID; // Defines as OEM ID or ATI board ID dependent on product type setting
sys/dev/drm/amd/include/atombios.h
2860
UCHAR ucMiscInfo1; // Tuner voltage (1:0) HW teletext support (3:2) FM audio decoder (5:4) reserved (6) audio scrambling (7)
sys/dev/drm/amd/include/atombios.h
2861
UCHAR ucMiscInfo2; // I2S input config (0) I2S output config (1) I2S Audio Chip (4:2) SPDIF Output Config (5) reserved (7:6)
sys/dev/drm/amd/include/atombios.h
2862
UCHAR ucMiscInfo3; // Video Decoder Type (3:0) Video In Standard/Crystal (7:4)
sys/dev/drm/amd/include/atombios.h
2863
UCHAR ucMiscInfo4; // Video Decoder Host Config (2:0) reserved (7:3)
sys/dev/drm/amd/include/atombios.h
2864
UCHAR ucVideoInput0Info;// Video Input 0 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/amd/include/atombios.h
2865
UCHAR ucVideoInput1Info;// Video Input 1 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/amd/include/atombios.h
2866
UCHAR ucVideoInput2Info;// Video Input 2 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/amd/include/atombios.h
2867
UCHAR ucVideoInput3Info;// Video Input 3 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/amd/include/atombios.h
2868
UCHAR ucVideoInput4Info;// Video Input 4 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/amd/include/atombios.h
2961
UCHAR ucASICMaxTemperature;
sys/dev/drm/amd/include/atombios.h
2962
UCHAR ucPadding[3]; //Don't use them
sys/dev/drm/amd/include/atombios.h
2977
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/amd/include/atombios.h
2978
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
2979
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
2995
UCHAR ucASICMaxTemperature;
sys/dev/drm/amd/include/atombios.h
2996
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
2997
UCHAR ucPadding[2]; //Don't use them
sys/dev/drm/amd/include/atombios.h
3013
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/amd/include/atombios.h
3014
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3015
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3031
UCHAR ucASICMaxTemperature;
sys/dev/drm/amd/include/atombios.h
3032
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
3033
UCHAR ucPadding[2]; //Don't use them
sys/dev/drm/amd/include/atombios.h
3050
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/amd/include/atombios.h
3051
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3052
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3068
UCHAR ucASICMaxTemperature;
sys/dev/drm/amd/include/atombios.h
3069
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
3088
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/amd/include/atombios.h
3089
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3090
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3107
UCHAR ucReserved1; //Was ucASICMaxTemperature;
sys/dev/drm/amd/include/atombios.h
3108
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
3128
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3129
UCHAR ucReserved4[3];
sys/dev/drm/amd/include/atombios.h
3139
UCHAR ucEMBEDDED_CAP:2; // Bit[1:0] Embedded feature level
sys/dev/drm/amd/include/atombios.h
3140
UCHAR ucReserved:2; // Bit[3:2] Reserved
sys/dev/drm/amd/include/atombios.h
3141
UCHAR ucBRANDING_ID:4; // Bit[7:4] Branding ID
sys/dev/drm/amd/include/atombios.h
3157
UCHAR ucReserved3; //Was ucASICMaxTemperature;
sys/dev/drm/amd/include/atombios.h
3158
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
3164
UCHAR ucRemoteDisplayConfig;
sys/dev/drm/amd/include/atombios.h
3165
UCHAR ucReserved5[3]; //Was usMinEngineClockPLL_Input and usMaxEngineClockPLL_Input
sys/dev/drm/amd/include/atombios.h
3176
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/amd/include/atombios.h
3177
UCHAR ucCoolingSolution_ID; //0: Air cooling; 1: Liquid cooling ... [COOLING_SOLUTION]
sys/dev/drm/amd/include/atombios.h
3179
UCHAR ucReserved9;
sys/dev/drm/amd/include/atombios.h
3207
UCHAR ucNumberOfCyclesInPeriodHi;
sys/dev/drm/amd/include/atombios.h
3208
UCHAR ucLCDTimingSel; //=0:not valid.!=0 sel this timing descriptor from LCD EDID.
sys/dev/drm/amd/include/atombios.h
3222
UCHAR ucMaxNBVoltage;
sys/dev/drm/amd/include/atombios.h
3223
UCHAR ucMinNBVoltage;
sys/dev/drm/amd/include/atombios.h
3224
UCHAR ucMemoryType; //[7:4]=1:DDR1;=2:DDR2;=3:DDR3.[3:0] is reserved
sys/dev/drm/amd/include/atombios.h
3225
UCHAR ucNumberOfCyclesInPeriod; //CG.FVTHROT_PWM_CTRL_REG0.NumberOfCyclesInPeriod
sys/dev/drm/amd/include/atombios.h
3226
UCHAR ucStartingPWM_HighTime; //CG.FVTHROT_PWM_CTRL_REG0.StartingPWM_HighTime
sys/dev/drm/amd/include/atombios.h
3227
UCHAR ucHTLinkWidth; //16 bit vs. 8 bit
sys/dev/drm/amd/include/atombios.h
3228
UCHAR ucMaxNBVoltageHigh;
sys/dev/drm/amd/include/atombios.h
3229
UCHAR ucMinNBVoltageHigh;
sys/dev/drm/amd/include/atombios.h
3286
UCHAR ucMemoryType; //[3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved
sys/dev/drm/amd/include/atombios.h
3287
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
3288
UCHAR ucDockingPinBit;
sys/dev/drm/amd/include/atombios.h
3289
UCHAR ucDockingPinPolarity;
sys/dev/drm/amd/include/atombios.h
3462
UCHAR ucHtcTmpLmt; //bit [22:16] of D24F3x64 Hardware Thermal Control (HTC) Register, may not be needed, TBD
sys/dev/drm/amd/include/atombios.h
3463
UCHAR ucTjOffset; //bit [28:22] of D24F3xE4 Thermtrip Status Register,may not be needed, TBD
sys/dev/drm/amd/include/atombios.h
3470
UCHAR ucMemoryType; //[3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved
sys/dev/drm/amd/include/atombios.h
3471
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
3661
UCHAR bfHW_Capable:1;
sys/dev/drm/amd/include/atombios.h
3662
UCHAR bfHW_EngineID:3;
sys/dev/drm/amd/include/atombios.h
3663
UCHAR bfI2C_LineMux:4;
sys/dev/drm/amd/include/atombios.h
3665
UCHAR bfI2C_LineMux:4;
sys/dev/drm/amd/include/atombios.h
3666
UCHAR bfHW_EngineID:3;
sys/dev/drm/amd/include/atombios.h
3667
UCHAR bfHW_Capable:1;
sys/dev/drm/amd/include/atombios.h
3674
UCHAR ucAccess;
sys/dev/drm/amd/include/atombios.h
3692
UCHAR ucClkMaskShift;
sys/dev/drm/amd/include/atombios.h
3693
UCHAR ucClkEnShift;
sys/dev/drm/amd/include/atombios.h
3694
UCHAR ucClkY_Shift;
sys/dev/drm/amd/include/atombios.h
3695
UCHAR ucClkA_Shift;
sys/dev/drm/amd/include/atombios.h
3696
UCHAR ucDataMaskShift;
sys/dev/drm/amd/include/atombios.h
3697
UCHAR ucDataEnShift;
sys/dev/drm/amd/include/atombios.h
3698
UCHAR ucDataY_Shift;
sys/dev/drm/amd/include/atombios.h
3699
UCHAR ucDataA_Shift;
sys/dev/drm/amd/include/atombios.h
3700
UCHAR ucReserved1;
sys/dev/drm/amd/include/atombios.h
3701
UCHAR ucReserved2;
sys/dev/drm/amd/include/atombios.h
3810
UCHAR ucH_Border; // From DFP EDID
sys/dev/drm/amd/include/atombios.h
3811
UCHAR ucV_Border;
sys/dev/drm/amd/include/atombios.h
3812
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
3813
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
3830
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/amd/include/atombios.h
3831
UCHAR ucOverscanRight; // right
sys/dev/drm/amd/include/atombios.h
3832
UCHAR ucOverscanLeft; // left
sys/dev/drm/amd/include/atombios.h
3833
UCHAR ucOverscanBottom; // bottom
sys/dev/drm/amd/include/atombios.h
3834
UCHAR ucOverscanTop; // top
sys/dev/drm/amd/include/atombios.h
3835
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
3862
UCHAR ucInternalModeNumber;
sys/dev/drm/amd/include/atombios.h
3863
UCHAR ucRefreshRate;
sys/dev/drm/amd/include/atombios.h
3879
UCHAR ucHBorder;
sys/dev/drm/amd/include/atombios.h
3880
UCHAR ucVBorder;
sys/dev/drm/amd/include/atombios.h
3882
UCHAR ucInternalModeNumber;
sys/dev/drm/amd/include/atombios.h
3883
UCHAR ucRefreshRate;
sys/dev/drm/amd/include/atombios.h
3905
UCHAR ucPowerSequenceDigOntoDEin10Ms;
sys/dev/drm/amd/include/atombios.h
3906
UCHAR ucPowerSequenceDEtoBLOnin10Ms;
sys/dev/drm/amd/include/atombios.h
3907
UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level}
sys/dev/drm/amd/include/atombios.h
3911
UCHAR ucPanelDefaultRefreshRate;
sys/dev/drm/amd/include/atombios.h
3912
UCHAR ucPanelIdentification;
sys/dev/drm/amd/include/atombios.h
3913
UCHAR ucSS_Id;
sys/dev/drm/amd/include/atombios.h
3925
UCHAR ucPowerSequenceDigOntoDEin10Ms;
sys/dev/drm/amd/include/atombios.h
3926
UCHAR ucPowerSequenceDEtoBLOnin10Ms;
sys/dev/drm/amd/include/atombios.h
3927
UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level}
sys/dev/drm/amd/include/atombios.h
3931
UCHAR ucPanelDefaultRefreshRate;
sys/dev/drm/amd/include/atombios.h
3932
UCHAR ucPanelIdentification;
sys/dev/drm/amd/include/atombios.h
3933
UCHAR ucSS_Id;
sys/dev/drm/amd/include/atombios.h
3936
UCHAR ucLCDPanel_SpecialHandlingCap;
sys/dev/drm/amd/include/atombios.h
3937
UCHAR ucPanelInfoSize; // start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable
sys/dev/drm/amd/include/atombios.h
3938
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
3978
UCHAR ucSupportedRefreshRate;
sys/dev/drm/amd/include/atombios.h
3979
UCHAR ucMinRefreshRateForDRR;
sys/dev/drm/amd/include/atombios.h
3999
UCHAR ucLCD_Misc; // Reorganized in V13
sys/dev/drm/amd/include/atombios.h
4005
UCHAR ucPanelDefaultRefreshRate;
sys/dev/drm/amd/include/atombios.h
4006
UCHAR ucPanelIdentification;
sys/dev/drm/amd/include/atombios.h
4007
UCHAR ucSS_Id;
sys/dev/drm/amd/include/atombios.h
4010
UCHAR ucLCDPanel_SpecialHandlingCap; // Reorganized in V13
sys/dev/drm/amd/include/atombios.h
4015
UCHAR ucPanelInfoSize; // start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable
sys/dev/drm/amd/include/atombios.h
4018
UCHAR ucPowerSequenceDIGONtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
4019
UCHAR ucPowerSequenceDEtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
4020
UCHAR ucPowerSequenceVARY_BLtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
4021
UCHAR ucPowerSequenceDEtoDIGON_in4Ms;
sys/dev/drm/amd/include/atombios.h
4023
UCHAR ucOffDelay_in4Ms;
sys/dev/drm/amd/include/atombios.h
4024
UCHAR ucPowerSequenceVARY_BLtoBLON_in4Ms;
sys/dev/drm/amd/include/atombios.h
4025
UCHAR ucPowerSequenceBLONtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
4026
UCHAR ucReserved1;
sys/dev/drm/amd/include/atombios.h
4028
UCHAR ucDPCD_eDP_CONFIGURATION_CAP; // dpcd 0dh
sys/dev/drm/amd/include/atombios.h
4029
UCHAR ucDPCD_MAX_LINK_RATE; // dpcd 01h
sys/dev/drm/amd/include/atombios.h
4030
UCHAR ucDPCD_MAX_LANE_COUNT; // dpcd 02h
sys/dev/drm/amd/include/atombios.h
4031
UCHAR ucDPCD_MAX_DOWNSPREAD; // dpcd 03h
sys/dev/drm/amd/include/atombios.h
4034
UCHAR uceDPToLVDSRxId;
sys/dev/drm/amd/include/atombios.h
4035
UCHAR ucLcdReservd;
sys/dev/drm/amd/include/atombios.h
4082
UCHAR ucRecordType;
sys/dev/drm/amd/include/atombios.h
4089
UCHAR ucRecordType;
sys/dev/drm/amd/include/atombios.h
4090
UCHAR ucRTSValue;
sys/dev/drm/amd/include/atombios.h
4097
UCHAR ucRecordType;
sys/dev/drm/amd/include/atombios.h
4108
UCHAR ucRecordType;
sys/dev/drm/amd/include/atombios.h
4109
UCHAR ucFakeEDIDLength; // = 128 means EDID lenght is 128 bytes, otherwise the EDID length = ucFakeEDIDLength*128
sys/dev/drm/amd/include/atombios.h
4110
UCHAR ucFakeEDIDString[1]; // This actually has ucFakeEdidLength elements.
sys/dev/drm/amd/include/atombios.h
4115
UCHAR ucRecordType;
sys/dev/drm/amd/include/atombios.h
4135
UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Bit2=1: PCIE REFCLK SS =0 iternal PPLL SS Others:TBD
sys/dev/drm/amd/include/atombios.h
4136
UCHAR ucSS_Step;
sys/dev/drm/amd/include/atombios.h
4137
UCHAR ucSS_Delay;
sys/dev/drm/amd/include/atombios.h
4138
UCHAR ucSS_Id;
sys/dev/drm/amd/include/atombios.h
4139
UCHAR ucRecommendedRef_Div;
sys/dev/drm/amd/include/atombios.h
4140
UCHAR ucSS_Range; //it was reserved for V11
sys/dev/drm/amd/include/atombios.h
4198
UCHAR ucTV_SuppportedStandard;
sys/dev/drm/amd/include/atombios.h
4199
UCHAR ucTV_BootUpDefaultStandard;
sys/dev/drm/amd/include/atombios.h
4200
UCHAR ucExt_TV_ASIC_ID;
sys/dev/drm/amd/include/atombios.h
4201
UCHAR ucExt_TV_ASIC_SlaveAddr;
sys/dev/drm/amd/include/atombios.h
4207
UCHAR ucRevisionNumber; //10h : Revision 1.0; 11h : Revision 1.1
sys/dev/drm/amd/include/atombios.h
4208
UCHAR ucMaxLinkRate; //06h : 1.62Gbps per lane; 0Ah = 2.7Gbps per lane
sys/dev/drm/amd/include/atombios.h
4209
UCHAR ucMaxLane; //Bits 4:0 = MAX_LANE_COUNT (1/2/4). Bit 7 = ENHANCED_FRAME_CAP
sys/dev/drm/amd/include/atombios.h
4210
UCHAR ucMaxDownSpread; //Bit0 = 0: No Down spread; Bit0 = 1: 0.5% (Subject to change according to DP spec)
sys/dev/drm/amd/include/atombios.h
4364
UCHAR ucGpioPinBitShift;
sys/dev/drm/amd/include/atombios.h
4365
UCHAR ucGPIO_ID;
sys/dev/drm/amd/include/atombios.h
4406
UCHAR ucSettings;
sys/dev/drm/amd/include/atombios.h
4407
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
441
UCHAR ucAction; //0:reserved //1:Memory //2:Engine
sys/dev/drm/amd/include/atombios.h
442
UCHAR ucReserved; //may expand to return larger Fbdiv later
sys/dev/drm/amd/include/atombios.h
443
UCHAR ucFbDiv; //return value
sys/dev/drm/amd/include/atombios.h
444
UCHAR ucPostDiv; //return value
sys/dev/drm/amd/include/atombios.h
4449
UCHAR ucBitShift;
sys/dev/drm/amd/include/atombios.h
4450
UCHAR ucPinActiveState; //ucPinActiveState: Bit0=1 active high, =0 active low
sys/dev/drm/amd/include/atombios.h
4452
UCHAR ucMiscInfo;
sys/dev/drm/amd/include/atombios.h
4453
UCHAR uc480i;
sys/dev/drm/amd/include/atombios.h
4454
UCHAR uc480p;
sys/dev/drm/amd/include/atombios.h
4455
UCHAR uc720p;
sys/dev/drm/amd/include/atombios.h
4456
UCHAR uc1080i;
sys/dev/drm/amd/include/atombios.h
4457
UCHAR ucLetterBoxMode;
sys/dev/drm/amd/include/atombios.h
4458
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
4459
UCHAR ucNumOfWbGpioBlocks; //For Component video D-Connector support. If zere, NTSC type connector
sys/dev/drm/amd/include/atombios.h
4469
UCHAR ucMiscInfo;
sys/dev/drm/amd/include/atombios.h
4470
UCHAR uc480i;
sys/dev/drm/amd/include/atombios.h
4471
UCHAR uc480p;
sys/dev/drm/amd/include/atombios.h
4472
UCHAR uc720p;
sys/dev/drm/amd/include/atombios.h
4473
UCHAR uc1080i;
sys/dev/drm/amd/include/atombios.h
4474
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
4475
UCHAR ucLetterBoxMode;
sys/dev/drm/amd/include/atombios.h
4476
UCHAR ucNumOfWbGpioBlocks; //For Component video D-Connector support. If zere, NTSC type connector
sys/dev/drm/amd/include/atombios.h
450
UCHAR ucAction; //0:reserved;COMPUTE_MEMORY_PLL_PARAM:Memory;COMPUTE_ENGINE_PLL_PARAM:Engine. it return ref_div to be written to register
sys/dev/drm/amd/include/atombios.h
452
UCHAR ucPostDiv; //return post div to be written to register
sys/dev/drm/amd/include/atombios.h
4530
UCHAR ucNumOfDispPath;
sys/dev/drm/amd/include/atombios.h
4531
UCHAR ucVersion;
sys/dev/drm/amd/include/atombios.h
4532
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
4546
UCHAR ucNumberOfObjects;
sys/dev/drm/amd/include/atombios.h
4547
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
4553
UCHAR ucNumberOfSrc;
sys/dev/drm/amd/include/atombios.h
4555
UCHAR ucNumberOfDst;
sys/dev/drm/amd/include/atombios.h
4591
UCHAR ucDP_Lane3_Source:2;
sys/dev/drm/amd/include/atombios.h
4592
UCHAR ucDP_Lane2_Source:2;
sys/dev/drm/amd/include/atombios.h
4593
UCHAR ucDP_Lane1_Source:2;
sys/dev/drm/amd/include/atombios.h
4594
UCHAR ucDP_Lane0_Source:2;
sys/dev/drm/amd/include/atombios.h
4596
UCHAR ucDP_Lane0_Source:2;
sys/dev/drm/amd/include/atombios.h
4597
UCHAR ucDP_Lane1_Source:2;
sys/dev/drm/amd/include/atombios.h
4598
UCHAR ucDP_Lane2_Source:2;
sys/dev/drm/amd/include/atombios.h
4599
UCHAR ucDP_Lane3_Source:2;
sys/dev/drm/amd/include/atombios.h
4611
UCHAR ucDVI_CLK_Source:2;
sys/dev/drm/amd/include/atombios.h
4612
UCHAR ucDVI_DATA0_Source:2;
sys/dev/drm/amd/include/atombios.h
4613
UCHAR ucDVI_DATA1_Source:2;
sys/dev/drm/amd/include/atombios.h
4614
UCHAR ucDVI_DATA2_Source:2;
sys/dev/drm/amd/include/atombios.h
4616
UCHAR ucDVI_DATA2_Source:2;
sys/dev/drm/amd/include/atombios.h
4617
UCHAR ucDVI_DATA1_Source:2;
sys/dev/drm/amd/include/atombios.h
4618
UCHAR ucDVI_DATA0_Source:2;
sys/dev/drm/amd/include/atombios.h
4619
UCHAR ucDVI_CLK_Source:2;
sys/dev/drm/amd/include/atombios.h
4628
UCHAR ucExtAUXDDCLutIndex; //An index into external AUX/DDC channel LUT
sys/dev/drm/amd/include/atombios.h
4629
UCHAR ucExtHPDPINLutIndex; //An index into external HPD pin LUT
sys/dev/drm/amd/include/atombios.h
4632
UCHAR ucChannelMapping; // if ucChannelMapping=0, using default one to one mapping
sys/dev/drm/amd/include/atombios.h
4636
UCHAR ucChPNInvert; // bit vector for up to 8 lanes, =0: P and N is not invert, =1 P and N is inverted
sys/dev/drm/amd/include/atombios.h
4658
UCHAR ucGuid [NUMBER_OF_UCHAR_FOR_GUID]; // a GUID is a 16 byte long string
sys/dev/drm/amd/include/atombios.h
4660
UCHAR ucChecksum; // a simple Checksum of the sum of whole structure equal to 0x0.
sys/dev/drm/amd/include/atombios.h
4661
UCHAR uc3DStereoPinId; // use for eDP panel
sys/dev/drm/amd/include/atombios.h
4662
UCHAR ucRemoteDisplayConfig;
sys/dev/drm/amd/include/atombios.h
4663
UCHAR uceDPToLVDSRxId;
sys/dev/drm/amd/include/atombios.h
4664
UCHAR ucFixDPVoltageSwing; // usCaps[1]=1, this indicate DP_LANE_SET value
sys/dev/drm/amd/include/atombios.h
4665
UCHAR Reserved[3]; // for potential expansion
sys/dev/drm/amd/include/atombios.h
4671
UCHAR ucRecordType; //An emun to indicate the record type
sys/dev/drm/amd/include/atombios.h
4672
UCHAR ucRecordSize; //The size of the whole record in byte
sys/dev/drm/amd/include/atombios.h
4706
UCHAR ucI2CAddr; //The slave address, it's 0 when the record is attached to connector for DDC
sys/dev/drm/amd/include/atombios.h
4712
UCHAR ucHPDIntGPIOID; //Corresponding block in GPIO_PIN_INFO table gives the pin info
sys/dev/drm/amd/include/atombios.h
4713
UCHAR ucPlugged_PinState;
sys/dev/drm/amd/include/atombios.h
4720
UCHAR ucProtectionFlag;
sys/dev/drm/amd/include/atombios.h
4721
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
4734
UCHAR ucNumberOfDevice;
sys/dev/drm/amd/include/atombios.h
4735
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
4743
UCHAR ucConfigGPIOID;
sys/dev/drm/amd/include/atombios.h
4744
UCHAR ucConfigGPIOState; //Set to 1 when it's active high to enable external flow in
sys/dev/drm/amd/include/atombios.h
4745
UCHAR ucFlowinGPIPID;
sys/dev/drm/amd/include/atombios.h
4746
UCHAR ucExtInGPIPID;
sys/dev/drm/amd/include/atombios.h
4752
UCHAR ucCTL1GPIO_ID;
sys/dev/drm/amd/include/atombios.h
4753
UCHAR ucCTL1GPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4754
UCHAR ucCTL2GPIO_ID;
sys/dev/drm/amd/include/atombios.h
4755
UCHAR ucCTL2GPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4756
UCHAR ucCTL3GPIO_ID;
sys/dev/drm/amd/include/atombios.h
4757
UCHAR ucCTL3GPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4758
UCHAR ucCTLFPGA_IN_ID;
sys/dev/drm/amd/include/atombios.h
4759
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
4765
UCHAR ucGPIOID; //Corresponding block in GPIO_PIN_INFO table gives the pin info
sys/dev/drm/amd/include/atombios.h
4766
UCHAR ucTVActiveState; //Indicating when the pin==0 or 1 when TV is connected
sys/dev/drm/amd/include/atombios.h
4772
UCHAR ucTMSGPIO_ID;
sys/dev/drm/amd/include/atombios.h
4773
UCHAR ucTMSGPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4774
UCHAR ucTCKGPIO_ID;
sys/dev/drm/amd/include/atombios.h
4775
UCHAR ucTCKGPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4776
UCHAR ucTDOGPIO_ID;
sys/dev/drm/amd/include/atombios.h
4777
UCHAR ucTDOGPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4778
UCHAR ucTDIGPIO_ID;
sys/dev/drm/amd/include/atombios.h
4779
UCHAR ucTDIGPIOState; //Set to 1 when it's active high
sys/dev/drm/amd/include/atombios.h
4780
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
4787
UCHAR ucGPIOID; // GPIO_ID, find the corresponding ID in GPIO_LUT table
sys/dev/drm/amd/include/atombios.h
4788
UCHAR ucGPIO_PinState; // Pin state showing how to set-up the pin
sys/dev/drm/amd/include/atombios.h
4794
UCHAR ucFlags; // Future expnadibility
sys/dev/drm/amd/include/atombios.h
4795
UCHAR ucNumberOfPins; // Number of GPIO pins used to control the object
sys/dev/drm/amd/include/atombios.h
48
#ifndef UCHAR
sys/dev/drm/amd/include/atombios.h
4827
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
4889
UCHAR ucFlowCntlGpioId;
sys/dev/drm/amd/include/atombios.h
4890
UCHAR ucSwapCntlGpioId;
sys/dev/drm/amd/include/atombios.h
4891
UCHAR ucConnectedDvoBundle;
sys/dev/drm/amd/include/atombios.h
4892
UCHAR ucPadding;
sys/dev/drm/amd/include/atombios.h
4904
UCHAR ucSubConnectorType; //CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D|X_ID_DUAL_LINK_DVI_D|HDMI_TYPE_A
sys/dev/drm/amd/include/atombios.h
4905
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
4912
UCHAR ucMuxType; //decide the number of ucMuxState, =0, no pin state, =1: single state with complement, >1: multiple state
sys/dev/drm/amd/include/atombios.h
4913
UCHAR ucMuxControlPin;
sys/dev/drm/amd/include/atombios.h
4914
UCHAR ucMuxState[2]; //for alligment purpose
sys/dev/drm/amd/include/atombios.h
4920
UCHAR ucMuxType;
sys/dev/drm/amd/include/atombios.h
4921
UCHAR ucMuxControlPin;
sys/dev/drm/amd/include/atombios.h
4922
UCHAR ucMuxState[2]; //for alligment purpose
sys/dev/drm/amd/include/atombios.h
4932
UCHAR ucHPDPINMap[MAX_NUMBER_OF_EXT_HPDPIN_LUT_ENTRIES]; //An fixed size array which maps external pins to internal GPIO_PIN_INFO table
sys/dev/drm/amd/include/atombios.h
4958
UCHAR ucMaxTmdsClkRateIn2_5Mhz;
sys/dev/drm/amd/include/atombios.h
4959
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
4966
UCHAR ucConnectorType;
sys/dev/drm/amd/include/atombios.h
4967
UCHAR ucPosition;
sys/dev/drm/amd/include/atombios.h
4981
UCHAR ucLength;
sys/dev/drm/amd/include/atombios.h
4982
UCHAR ucWidth;
sys/dev/drm/amd/include/atombios.h
4983
UCHAR ucConnNum;
sys/dev/drm/amd/include/atombios.h
4984
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
4996
UCHAR ucNumOfVoltageEntries;
sys/dev/drm/amd/include/atombios.h
4997
UCHAR ucBytesPerVoltageEntry;
sys/dev/drm/amd/include/atombios.h
4998
UCHAR ucVoltageStep; //Indicating in how many mv increament is one step, 0.5mv unit
sys/dev/drm/amd/include/atombios.h
4999
UCHAR ucDefaultVoltageEntry;
sys/dev/drm/amd/include/atombios.h
500
UCHAR ucRefDiv; //Output Parameter
sys/dev/drm/amd/include/atombios.h
5000
UCHAR ucVoltageControlI2cLine;
sys/dev/drm/amd/include/atombios.h
5001
UCHAR ucVoltageControlAddress;
sys/dev/drm/amd/include/atombios.h
5002
UCHAR ucVoltageControlOffset;
sys/dev/drm/amd/include/atombios.h
5009
UCHAR ucVoltageEntries[64]; //64 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries*ucBytesPerVoltageEntry
sys/dev/drm/amd/include/atombios.h
501
UCHAR ucPostDiv; //Output Parameter
sys/dev/drm/amd/include/atombios.h
5017
UCHAR ucNumOfVoltageEntries; // Number of Voltage Entry, which indicate max Voltage
sys/dev/drm/amd/include/atombios.h
5018
UCHAR ucFlag; // bit0=0 :step is 1mv =1 0.5mv
sys/dev/drm/amd/include/atombios.h
5019
UCHAR ucBaseVID; // if there is no lookup table, VID= BaseVID + ( Vol - BaseLevle ) /VoltageStep
sys/dev/drm/amd/include/atombios.h
502
UCHAR ucCntlFlag; //Output Parameter
sys/dev/drm/amd/include/atombios.h
5020
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5021
UCHAR ucVIDAdjustEntries[32]; // 32 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries
sys/dev/drm/amd/include/atombios.h
503
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5032
UCHAR ucNumOfVoltageEntries; // Number of Voltage Entry, which indicate max Voltage
sys/dev/drm/amd/include/atombios.h
5033
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
5039
UCHAR ucVoltageControlId; //Indicate it is controlled by I2C or GPIO or HW state machine
sys/dev/drm/amd/include/atombios.h
5040
UCHAR ucVoltageControlI2cLine;
sys/dev/drm/amd/include/atombios.h
5041
UCHAR ucVoltageControlAddress;
sys/dev/drm/amd/include/atombios.h
5042
UCHAR ucVoltageControlOffset;
sys/dev/drm/amd/include/atombios.h
5044
UCHAR ucGpioPinBitShift[9]; //at most 8 pin support 255 VIDs, termintate with 0xff
sys/dev/drm/amd/include/atombios.h
5045
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5077
UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
sys/dev/drm/amd/include/atombios.h
5078
UCHAR ucSize; //Size of Object
sys/dev/drm/amd/include/atombios.h
5085
UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
sys/dev/drm/amd/include/atombios.h
5086
UCHAR ucSize; //Size of Object
sys/dev/drm/amd/include/atombios.h
5105
UCHAR ucLeakageId;
sys/dev/drm/amd/include/atombios.h
5106
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5111
UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
sys/dev/drm/amd/include/atombios.h
5112
UCHAR ucVoltageMode; //Indicate voltage control mode: Init/Set/Leakage/Set phase
sys/dev/drm/amd/include/atombios.h
5143
UCHAR ucVoltageRegulatorId; //Indicate Voltage Regulator Id
sys/dev/drm/amd/include/atombios.h
5144
UCHAR ucVoltageControlI2cLine;
sys/dev/drm/amd/include/atombios.h
5145
UCHAR ucVoltageControlAddress;
sys/dev/drm/amd/include/atombios.h
5146
UCHAR ucVoltageControlOffset;
sys/dev/drm/amd/include/atombios.h
5147
UCHAR ucVoltageControlFlag; // Bit0: 0 - One byte data; 1 - Two byte data
sys/dev/drm/amd/include/atombios.h
5148
UCHAR ulReserved[3];
sys/dev/drm/amd/include/atombios.h
5159
UCHAR ucVoltageGpioCntlId; // default is 0 which indicate control through CG VID mode
sys/dev/drm/amd/include/atombios.h
5160
UCHAR ucGpioEntryNum; // indiate the entry numbers of Votlage/Gpio value Look up table
sys/dev/drm/amd/include/atombios.h
5161
UCHAR ucPhaseDelay; // phase delay in unit of micro second
sys/dev/drm/amd/include/atombios.h
5162
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5170
UCHAR ucLeakageCntlId; // default is 0
sys/dev/drm/amd/include/atombios.h
5171
UCHAR ucLeakageEntryNum; // indicate the entry number of LeakageId/Voltage Lut table
sys/dev/drm/amd/include/atombios.h
5172
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
5188
UCHAR ucSVDGpioId; //0~31 indicate GPIO0~31
sys/dev/drm/amd/include/atombios.h
5189
UCHAR ucSVCGpioId; //0~31 indicate GPIO0~31
sys/dev/drm/amd/include/atombios.h
5198
UCHAR ucMergedVType; // VDDC/VDCCI/....
sys/dev/drm/amd/include/atombios.h
5199
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
5207
UCHAR ucDPMTblVIndex; // Voltage Index in SMC_DPM_Table structure VddcTable/VddGfxTable
sys/dev/drm/amd/include/atombios.h
5208
UCHAR ucDPMState; // DPMState0~7
sys/dev/drm/amd/include/atombios.h
5236
UCHAR ucProfileId;
sys/dev/drm/amd/include/atombios.h
5237
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5258
UCHAR ucLeakageBinNum; // indicate the entry number of LeakageId/Voltage Lut table
sys/dev/drm/amd/include/atombios.h
5261
UCHAR ucElbVDDC_Num;
sys/dev/drm/amd/include/atombios.h
5265
UCHAR ucElbVDDCI_Num;
sys/dev/drm/amd/include/atombios.h
5276
UCHAR ucEfuseBitLSB; // Efuse bit LSB in DWORD address, for example Index 911, usEfuseBitLSB= 911-112*8=15
sys/dev/drm/amd/include/atombios.h
5277
UCHAR ucEfuseLength; // Efuse bits length,
sys/dev/drm/amd/include/atombios.h
5286
UCHAR ucEfuseBitLSB; // Efuse bit LSB in DWORD address, for example Index 911, usEfuseBitLSB= 911-112*8=15
sys/dev/drm/amd/include/atombios.h
5287
UCHAR ucEfuseLength; // Efuse bits length,
sys/dev/drm/amd/include/atombios.h
5310
UCHAR ucLkgEfuseBitLSB;
sys/dev/drm/amd/include/atombios.h
5311
UCHAR ucLkgEfuseLength;
sys/dev/drm/amd/include/atombios.h
533
UCHAR ucRefDiv; //Output Parameter
sys/dev/drm/amd/include/atombios.h
534
UCHAR ucPostDiv; //Output Parameter
sys/dev/drm/amd/include/atombios.h
5351
UCHAR ucLkgEfuseBitLSB;
sys/dev/drm/amd/include/atombios.h
5352
UCHAR ucLkgEfuseLength;
sys/dev/drm/amd/include/atombios.h
537
UCHAR ucCntlFlag; //Output Flags
sys/dev/drm/amd/include/atombios.h
538
UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0) mode
sys/dev/drm/amd/include/atombios.h
5393
UCHAR ucLkgEfuseBitLSB;
sys/dev/drm/amd/include/atombios.h
5394
UCHAR ucLkgEfuseLength;
sys/dev/drm/amd/include/atombios.h
540
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5452
UCHAR ucLkgEfuseBitLSB;
sys/dev/drm/amd/include/atombios.h
5453
UCHAR ucLkgEfuseLength;
sys/dev/drm/amd/include/atombios.h
5487
UCHAR ucSM_A0_sign;
sys/dev/drm/amd/include/atombios.h
5488
UCHAR ucSM_A1_sign;
sys/dev/drm/amd/include/atombios.h
5489
UCHAR ucSM_A2_sign;
sys/dev/drm/amd/include/atombios.h
5490
UCHAR ucSM_A3_sign;
sys/dev/drm/amd/include/atombios.h
5491
UCHAR ucSM_A4_sign;
sys/dev/drm/amd/include/atombios.h
5492
UCHAR ucSM_A5_sign;
sys/dev/drm/amd/include/atombios.h
5493
UCHAR ucSM_A6_sign;
sys/dev/drm/amd/include/atombios.h
5494
UCHAR ucSM_A7_sign;
sys/dev/drm/amd/include/atombios.h
5514
UCHAR ucLkgEfuseBitLSB; //Efuse Lkg_FT bit shift in 32bit DWORD
sys/dev/drm/amd/include/atombios.h
5515
UCHAR ucLkgEfuseLength; //Efuse Lkg_FT length
sys/dev/drm/amd/include/atombios.h
5531
UCHAR ucSM_A0_sign; //def="EVV_SM_A0_SIGN" descr="=0 SM_A0 is postive. =1: SM_A0 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5532
UCHAR ucSM_A1_sign; //def="EVV_SM_A1_SIGN" descr="=0 SM_A1 is postive. =1: SM_A1 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5533
UCHAR ucSM_A2_sign; //def="EVV_SM_A2_SIGN" descr="=0 SM_A2 is postive. =1: SM_A2 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5534
UCHAR ucSM_A3_sign; //def="EVV_SM_A3_SIGN" descr="=0 SM_A3 is postive. =1: SM_A3 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5535
UCHAR ucSM_A4_sign; //def="EVV_SM_A4_SIGN" descr="=0 SM_A4 is postive. =1: SM_A4 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5536
UCHAR ucSM_A5_sign; //def="EVV_SM_A5_SIGN" descr="=0 SM_A5 is postive. =1: SM_A5 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5537
UCHAR ucSM_A6_sign; //def="EVV_SM_A6_SIGN" descr="=0 SM_A6 is postive. =1: SM_A6 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5538
UCHAR ucSM_A7_sign; //def="EVV_SM_A7_SIGN" descr="=0 SM_A7 is postive. =1: SM_A7 is negative" unit="1"/>
sys/dev/drm/amd/include/atombios.h
5558
UCHAR ucLkgEfuseBitLSB;
sys/dev/drm/amd/include/atombios.h
5559
UCHAR ucLkgEfuseLength;
sys/dev/drm/amd/include/atombios.h
5575
UCHAR ucSM_A0_sign;
sys/dev/drm/amd/include/atombios.h
5576
UCHAR ucSM_A1_sign;
sys/dev/drm/amd/include/atombios.h
5577
UCHAR ucSM_A2_sign;
sys/dev/drm/amd/include/atombios.h
5578
UCHAR ucSM_A3_sign;
sys/dev/drm/amd/include/atombios.h
5579
UCHAR ucSM_A4_sign;
sys/dev/drm/amd/include/atombios.h
5580
UCHAR ucSM_A5_sign;
sys/dev/drm/amd/include/atombios.h
5581
UCHAR ucSM_A6_sign;
sys/dev/drm/amd/include/atombios.h
5582
UCHAR ucSM_A7_sign;
sys/dev/drm/amd/include/atombios.h
560
UCHAR ucPllRefDiv; //Output Parameter: PLL ref divider
sys/dev/drm/amd/include/atombios.h
561
UCHAR ucPllPostDiv; //Output Parameter: PLL post divider
sys/dev/drm/amd/include/atombios.h
5614
UCHAR ucEnableGB_VDROOP_TABLE_CKSOFF;
sys/dev/drm/amd/include/atombios.h
5615
UCHAR ucEnableGB_VDROOP_TABLE_CKSON;
sys/dev/drm/amd/include/atombios.h
5616
UCHAR ucEnableGB_FUSE_TABLE_CKSOFF;
sys/dev/drm/amd/include/atombios.h
5617
UCHAR ucEnableGB_FUSE_TABLE_CKSON;
sys/dev/drm/amd/include/atombios.h
5619
UCHAR ucEnableApplyAVFS_CKS_OFF_Voltage;
sys/dev/drm/amd/include/atombios.h
562
UCHAR ucPllCntlFlag; //Output Flags: control flag
sys/dev/drm/amd/include/atombios.h
5620
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5626
UCHAR ucVco_setting; // 1: 3-6GHz, 3: 2-4GHz
sys/dev/drm/amd/include/atombios.h
5627
UCHAR ucPostdiv; // divide by 2^n
sys/dev/drm/amd/include/atombios.h
563
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
5638
UCHAR ucSclkEntryNum; // for potential future extend, indicate the number of ATOM_SCLK_FCW_RANGE_ENTRY_V1
sys/dev/drm/amd/include/atombios.h
5639
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
5648
UCHAR GfxIpMinVer;
sys/dev/drm/amd/include/atombios.h
5649
UCHAR GfxIpMajVer;
sys/dev/drm/amd/include/atombios.h
5650
UCHAR max_shader_engines;
sys/dev/drm/amd/include/atombios.h
5651
UCHAR max_tile_pipes;
sys/dev/drm/amd/include/atombios.h
5652
UCHAR max_cu_per_sh;
sys/dev/drm/amd/include/atombios.h
5653
UCHAR max_sh_per_se;
sys/dev/drm/amd/include/atombios.h
5654
UCHAR max_backends_per_se;
sys/dev/drm/amd/include/atombios.h
5655
UCHAR max_texture_channel_caches;
sys/dev/drm/amd/include/atombios.h
5661
UCHAR ucPwrSrcId; // Power source
sys/dev/drm/amd/include/atombios.h
5662
UCHAR ucPwrSensorType; // GPIO, I2C or none
sys/dev/drm/amd/include/atombios.h
5663
UCHAR ucPwrSensId; // if GPIO detect, it is GPIO id, if I2C detect, it is I2C id
sys/dev/drm/amd/include/atombios.h
5664
UCHAR ucPwrSensSlaveAddr; // Slave address if I2C detect
sys/dev/drm/amd/include/atombios.h
5665
UCHAR ucPwrSensRegIndex; // I2C register Index if I2C detect
sys/dev/drm/amd/include/atombios.h
5666
UCHAR ucPwrSensRegBitMask; // detect which bit is used if I2C detect
sys/dev/drm/amd/include/atombios.h
5667
UCHAR ucPwrSensActiveState; // high active or low active
sys/dev/drm/amd/include/atombios.h
5668
UCHAR ucReserve[3]; // reserve
sys/dev/drm/amd/include/atombios.h
5675
UCHAR asPwrbehave[16];
sys/dev/drm/amd/include/atombios.h
5728
UCHAR ucHtcTmpLmt;
sys/dev/drm/amd/include/atombios.h
5729
UCHAR ucHtcHystLmt;
sys/dev/drm/amd/include/atombios.h
5738
UCHAR ucMemoryType;
sys/dev/drm/amd/include/atombios.h
5739
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
5762
UCHAR ulBoostVid_2bit;
sys/dev/drm/amd/include/atombios.h
5763
UCHAR EnableBoost;
sys/dev/drm/amd/include/atombios.h
5766
UCHAR ucLvdsMisc;
sys/dev/drm/amd/include/atombios.h
5767
UCHAR ucLVDSReserved;
sys/dev/drm/amd/include/atombios.h
585
UCHAR ucSclkPostDiv; //PLL post divider = 2^ucSclkPostDiv
sys/dev/drm/amd/include/atombios.h
586
UCHAR ucSclkVcoMode; //0: 4G~8Ghz, 1:3G~6Ghz,3: 2G~4Ghz, 2:Reserved
sys/dev/drm/amd/include/atombios.h
587
UCHAR ucSclkPllRange; //GreenTable SCLK PLL range entry index ( 0~7 )
sys/dev/drm/amd/include/atombios.h
588
UCHAR ucSscEnable;
sys/dev/drm/amd/include/atombios.h
5926
UCHAR ucHtcTmpLmt;
sys/dev/drm/amd/include/atombios.h
5927
UCHAR ucHtcHystLmt;
sys/dev/drm/amd/include/atombios.h
5936
UCHAR ucMemoryType;
sys/dev/drm/amd/include/atombios.h
5937
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
5938
UCHAR strVBIOSMsg[40];
sys/dev/drm/amd/include/atombios.h
5960
UCHAR ulBoostVid_2bit;
sys/dev/drm/amd/include/atombios.h
5961
UCHAR EnableBoost;
sys/dev/drm/amd/include/atombios.h
5964
UCHAR ucLvdsMisc;
sys/dev/drm/amd/include/atombios.h
5965
UCHAR ucTravisLVDSVolAdjust;
sys/dev/drm/amd/include/atombios.h
5966
UCHAR ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
5967
UCHAR ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
5968
UCHAR ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
5969
UCHAR ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
sys/dev/drm/amd/include/atombios.h
5970
UCHAR ucLVDSOffToOnDelay_in4Ms;
sys/dev/drm/amd/include/atombios.h
5971
UCHAR ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
sys/dev/drm/amd/include/atombios.h
5972
UCHAR ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
5973
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
5979
UCHAR ucNBDPMEnable;
sys/dev/drm/amd/include/atombios.h
5980
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
5981
UCHAR ucDPMState0VclkFid;
sys/dev/drm/amd/include/atombios.h
5982
UCHAR ucDPMState0DclkFid;
sys/dev/drm/amd/include/atombios.h
5983
UCHAR ucDPMState1VclkFid;
sys/dev/drm/amd/include/atombios.h
5984
UCHAR ucDPMState1DclkFid;
sys/dev/drm/amd/include/atombios.h
5985
UCHAR ucDPMState2VclkFid;
sys/dev/drm/amd/include/atombios.h
5986
UCHAR ucDPMState2DclkFid;
sys/dev/drm/amd/include/atombios.h
5987
UCHAR ucDPMState3VclkFid;
sys/dev/drm/amd/include/atombios.h
5988
UCHAR ucDPMState3DclkFid;
sys/dev/drm/amd/include/atombios.h
608
UCHAR ucDllSpeed; //Output
sys/dev/drm/amd/include/atombios.h
609
UCHAR ucPostDiv; //Output
sys/dev/drm/amd/include/atombios.h
611
UCHAR ucInputFlag; //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
sys/dev/drm/amd/include/atombios.h
612
UCHAR ucPllCntlFlag; //Output:
sys/dev/drm/amd/include/atombios.h
614
UCHAR ucBWCntl;
sys/dev/drm/amd/include/atombios.h
6158
UCHAR ucHtcTmpLmt;
sys/dev/drm/amd/include/atombios.h
6159
UCHAR ucHtcHystLmt;
sys/dev/drm/amd/include/atombios.h
6167
UCHAR ucMemoryType;
sys/dev/drm/amd/include/atombios.h
6168
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
6169
UCHAR strVBIOSMsg[40];
sys/dev/drm/amd/include/atombios.h
6191
UCHAR ucLvdsMisc;
sys/dev/drm/amd/include/atombios.h
6192
UCHAR ucTravisLVDSVolAdjust;
sys/dev/drm/amd/include/atombios.h
6193
UCHAR ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
6194
UCHAR ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
6195
UCHAR ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
6196
UCHAR ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
sys/dev/drm/amd/include/atombios.h
6197
UCHAR ucLVDSOffToOnDelay_in4Ms;
sys/dev/drm/amd/include/atombios.h
6198
UCHAR ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
sys/dev/drm/amd/include/atombios.h
6199
UCHAR ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
6200
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
6359
UCHAR ucI2cRegIndex;
sys/dev/drm/amd/include/atombios.h
6360
UCHAR ucI2cRegVal;
sys/dev/drm/amd/include/atombios.h
6376
UCHAR ucHtcTmpLmt;
sys/dev/drm/amd/include/atombios.h
6377
UCHAR ucHtcHystLmt;
sys/dev/drm/amd/include/atombios.h
6385
UCHAR ucMemoryType;
sys/dev/drm/amd/include/atombios.h
6386
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
6387
UCHAR strVBIOSMsg[40];
sys/dev/drm/amd/include/atombios.h
6389
UCHAR ucExtHDMIReDrvSlvAddr;
sys/dev/drm/amd/include/atombios.h
6390
UCHAR ucExtHDMIReDrvRegNum;
sys/dev/drm/amd/include/atombios.h
6412
UCHAR ucLvdsMisc;
sys/dev/drm/amd/include/atombios.h
6413
UCHAR ucTravisLVDSVolAdjust;
sys/dev/drm/amd/include/atombios.h
6414
UCHAR ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
6415
UCHAR ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
6416
UCHAR ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
6417
UCHAR ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
sys/dev/drm/amd/include/atombios.h
6418
UCHAR ucLVDSOffToOnDelay_in4Ms;
sys/dev/drm/amd/include/atombios.h
6419
UCHAR ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
sys/dev/drm/amd/include/atombios.h
6420
UCHAR ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
6421
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
6428
UCHAR ucEDPv1_4VSMode;
sys/dev/drm/amd/include/atombios.h
6429
UCHAR ucReserved2;
sys/dev/drm/amd/include/atombios.h
6456
UCHAR ucProfileID; // SENSOR_PROFILES
sys/dev/drm/amd/include/atombios.h
6467
UCHAR ucID; // 0: Rear, 1: Front right of user, 2: Front left of user
sys/dev/drm/amd/include/atombios.h
6468
UCHAR strModuleName[8];
sys/dev/drm/amd/include/atombios.h
6474
UCHAR ucID; // 0: Rear, 1: Front
sys/dev/drm/amd/include/atombios.h
6475
UCHAR strName[8];
sys/dev/drm/amd/include/atombios.h
6499
UCHAR ucHtcTmpLmt;
sys/dev/drm/amd/include/atombios.h
6500
UCHAR ucHtcHystLmt;
sys/dev/drm/amd/include/atombios.h
6508
UCHAR ucMemoryType;
sys/dev/drm/amd/include/atombios.h
6509
UCHAR ucUMAChannelNumber;
sys/dev/drm/amd/include/atombios.h
6532
UCHAR ucLvdsMisc;
sys/dev/drm/amd/include/atombios.h
6533
UCHAR ucTravisLVDSVolAdjust;
sys/dev/drm/amd/include/atombios.h
6534
UCHAR ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
6535
UCHAR ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
6536
UCHAR ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
sys/dev/drm/amd/include/atombios.h
6537
UCHAR ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
sys/dev/drm/amd/include/atombios.h
6538
UCHAR ucLVDSOffToOnDelay_in4Ms;
sys/dev/drm/amd/include/atombios.h
6539
UCHAR ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
sys/dev/drm/amd/include/atombios.h
6540
UCHAR ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
sys/dev/drm/amd/include/atombios.h
6541
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/amd/include/atombios.h
6549
UCHAR ucEDPv1_4VSMode;
sys/dev/drm/amd/include/atombios.h
6550
UCHAR ucReserved2;
sys/dev/drm/amd/include/atombios.h
6583
UCHAR ucNunberOfBytes; //Indicates how many bytes SW needs to write to the external ASIC for one block, besides to "Start" and "Stop"
sys/dev/drm/amd/include/atombios.h
6584
UCHAR ucI2CData[1]; //I2C data in bytes, should be less than 16 bytes usually
sys/dev/drm/amd/include/atombios.h
6592
UCHAR ucSSChipID; //SS chip being used
sys/dev/drm/amd/include/atombios.h
6593
UCHAR ucSSChipSlaveAddr; //Slave Address to set up this SS chip
sys/dev/drm/amd/include/atombios.h
6594
UCHAR ucNumOfI2CDataRecords; //number of data block
sys/dev/drm/amd/include/atombios.h
6616
UCHAR ucClockIndication; //Indicate which clock source needs SS
sys/dev/drm/amd/include/atombios.h
6617
UCHAR ucSpreadSpectrumMode; //Bit1=0 Down Spread,=1 Center Spread.
sys/dev/drm/amd/include/atombios.h
6618
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
664
UCHAR ucMclkDPMState;
sys/dev/drm/amd/include/atombios.h
6642
UCHAR ucClockIndication; //Indicate which clock source needs SS
sys/dev/drm/amd/include/atombios.h
6643
UCHAR ucSpreadSpectrumMode; //Bit0=0 Down Spread,=1 Center Spread, bit1=0: internal SS bit1=1: external SS
sys/dev/drm/amd/include/atombios.h
6644
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
665
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
6673
UCHAR ucClockIndication; //Indicate which clock source needs SS
sys/dev/drm/amd/include/atombios.h
6674
UCHAR ucSpreadSpectrumMode; //Bit0=0 Down Spread,=1 Center Spread, bit1=0: internal SS bit1=1: external SS
sys/dev/drm/amd/include/atombios.h
6675
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
7154
UCHAR ucAction; //not define yet
sys/dev/drm/amd/include/atombios.h
7155
UCHAR ucFbDiv_Hi; //Fbdiv Hi byte
sys/dev/drm/amd/include/atombios.h
7156
UCHAR ucFbDiv; //FB value
sys/dev/drm/amd/include/atombios.h
7157
UCHAR ucPostDiv; //Post div
sys/dev/drm/amd/include/atombios.h
7168
UCHAR ucGPIO_ID; //return value, read from GPIO pins
sys/dev/drm/amd/include/atombios.h
7169
UCHAR ucGPIOBitShift; //define which bit in uGPIOBitVal need to be update
sys/dev/drm/amd/include/atombios.h
7170
UCHAR ucGPIOBitVal; //Set/Reset corresponding bit defined in ucGPIOBitMask
sys/dev/drm/amd/include/atombios.h
7171
UCHAR ucAction; //=GPIO_PIN_WRITE: Read; =GPIO_PIN_READ: Write
sys/dev/drm/amd/include/atombios.h
7176
UCHAR ucScaler; // ATOM_SCALER1, ATOM_SCALER2
sys/dev/drm/amd/include/atombios.h
7177
UCHAR ucEnable; // ATOM_SCALER_DISABLE or ATOM_SCALER_CENTER or ATOM_SCALER_EXPANSION
sys/dev/drm/amd/include/atombios.h
7178
UCHAR ucTVStandard; //
sys/dev/drm/amd/include/atombios.h
7179
UCHAR ucPadding[1];
sys/dev/drm/amd/include/atombios.h
7192
UCHAR ucHWIconVertOffset; // Hardware Icon Vertical offset
sys/dev/drm/amd/include/atombios.h
7193
UCHAR ucHWIconHorzOffset; // Hardware Icon Horizontal offset
sys/dev/drm/amd/include/atombios.h
7194
UCHAR ucSelection; // ATOM_CURSOR1 or ATOM_ICON1 or ATOM_CURSOR2 or ATOM_ICON2
sys/dev/drm/amd/include/atombios.h
7195
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
7208
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/amd/include/atombios.h
7209
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
7216
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/amd/include/atombios.h
7217
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
7218
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
7225
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/amd/include/atombios.h
7226
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
7235
UCHAR ucColorDepth;
sys/dev/drm/amd/include/atombios.h
7236
UCHAR ucPixelFormat;
sys/dev/drm/amd/include/atombios.h
7237
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/amd/include/atombios.h
7238
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
7239
UCHAR ucModeType;
sys/dev/drm/amd/include/atombios.h
7240
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
7281
UCHAR ucLutId;
sys/dev/drm/amd/include/atombios.h
7282
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
7296
UCHAR ucInterruptId;
sys/dev/drm/amd/include/atombios.h
7297
UCHAR ucServiceId;
sys/dev/drm/amd/include/atombios.h
7298
UCHAR ucStatus;
sys/dev/drm/amd/include/atombios.h
7299
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
7322
UCHAR ucBitShift;
sys/dev/drm/amd/include/atombios.h
7323
UCHAR ucBitLength;
sys/dev/drm/amd/include/atombios.h
7336
UCHAR IOAccessSequence[256];
sys/dev/drm/amd/include/atombios.h
7372
UCHAR ucVMode_Num; //Video mode number
sys/dev/drm/amd/include/atombios.h
7373
UCHAR ucTV_Mode_Num; //Internal TV mode number
sys/dev/drm/amd/include/atombios.h
7391
UCHAR ucTV_Mode_Num;
sys/dev/drm/amd/include/atombios.h
7423
UCHAR ucMemoryType;
sys/dev/drm/amd/include/atombios.h
7424
UCHAR ucMemoryVendor;
sys/dev/drm/amd/include/atombios.h
7425
UCHAR ucAdjMCId;
sys/dev/drm/amd/include/atombios.h
7426
UCHAR ucDynClkId;
sys/dev/drm/amd/include/atombios.h
7456
UCHAR ucPreRegDataLength; // offset in ATOM_INIT_REG_DATA_BLOCK.saRegDataBuf
sys/dev/drm/amd/include/atombios.h
755
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
756
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
7566
UCHAR ucRevision;
sys/dev/drm/amd/include/atombios.h
7567
UCHAR ucChecksum;
sys/dev/drm/amd/include/atombios.h
7568
UCHAR ucReserved1;
sys/dev/drm/amd/include/atombios.h
7569
UCHAR ucReserved2;
sys/dev/drm/amd/include/atombios.h
7587
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/amd/include/atombios.h
7588
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] reserved;
sys/dev/drm/amd/include/atombios.h
7589
UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender
sys/dev/drm/amd/include/atombios.h
7590
UCHAR ucMemoryDeviceCfg; // [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32...
sys/dev/drm/amd/include/atombios.h
7591
UCHAR ucRow; // Number of Row,in power of 2;
sys/dev/drm/amd/include/atombios.h
7592
UCHAR ucColumn; // Number of Column,in power of 2;
sys/dev/drm/amd/include/atombios.h
7593
UCHAR ucBank; // Nunber of Bank;
sys/dev/drm/amd/include/atombios.h
7594
UCHAR ucRank; // Number of Rank, in power of 2
sys/dev/drm/amd/include/atombios.h
7595
UCHAR ucChannelNum; // Number of channel;
sys/dev/drm/amd/include/atombios.h
7596
UCHAR ucChannelConfig; // [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2
sys/dev/drm/amd/include/atombios.h
7597
UCHAR ucDefaultMVDDQ_ID; // Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data;
sys/dev/drm/amd/include/atombios.h
7598
UCHAR ucDefaultMVDDC_ID; // Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data;
sys/dev/drm/amd/include/atombios.h
7599
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
7614
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/amd/include/atombios.h
7615
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now;
sys/dev/drm/amd/include/atombios.h
7616
UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed
sys/dev/drm/amd/include/atombios.h
7617
UCHAR ucMemoryDeviceCfg; // [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32...
sys/dev/drm/amd/include/atombios.h
7618
UCHAR ucRow; // Number of Row,in power of 2;
sys/dev/drm/amd/include/atombios.h
7619
UCHAR ucColumn; // Number of Column,in power of 2;
sys/dev/drm/amd/include/atombios.h
7620
UCHAR ucBank; // Nunber of Bank;
sys/dev/drm/amd/include/atombios.h
7621
UCHAR ucRank; // Number of Rank, in power of 2
sys/dev/drm/amd/include/atombios.h
7622
UCHAR ucChannelNum; // Number of channel;
sys/dev/drm/amd/include/atombios.h
7623
UCHAR ucChannelConfig; // [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2
sys/dev/drm/amd/include/atombios.h
7624
UCHAR ucDefaultMVDDQ_ID; // Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data;
sys/dev/drm/amd/include/atombios.h
7625
UCHAR ucDefaultMVDDC_ID; // Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data;
sys/dev/drm/amd/include/atombios.h
7626
UCHAR ucRefreshRateFactor;
sys/dev/drm/amd/include/atombios.h
7627
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
7642
UCHAR ucCL; // CAS latency
sys/dev/drm/amd/include/atombios.h
7643
UCHAR ucWL; // WRITE Latency
sys/dev/drm/amd/include/atombios.h
7644
UCHAR uctRAS; // tRAS
sys/dev/drm/amd/include/atombios.h
7645
UCHAR uctRC; // tRC
sys/dev/drm/amd/include/atombios.h
7646
UCHAR uctRFC; // tRFC
sys/dev/drm/amd/include/atombios.h
7647
UCHAR uctRCDR; // tRCDR
sys/dev/drm/amd/include/atombios.h
7648
UCHAR uctRCDW; // tRCDW
sys/dev/drm/amd/include/atombios.h
7649
UCHAR uctRP; // tRP
sys/dev/drm/amd/include/atombios.h
765
UCHAR ucDispPipeId; // ATOM_CRTC1, ATOM_CRTC2, ...
sys/dev/drm/amd/include/atombios.h
7650
UCHAR uctRRD; // tRRD
sys/dev/drm/amd/include/atombios.h
7651
UCHAR uctWR; // tWR
sys/dev/drm/amd/include/atombios.h
7652
UCHAR uctWTR; // tWTR
sys/dev/drm/amd/include/atombios.h
7653
UCHAR uctPDIX; // tPDIX
sys/dev/drm/amd/include/atombios.h
7654
UCHAR uctFAW; // tFAW
sys/dev/drm/amd/include/atombios.h
7655
UCHAR uctAOND; // tAOND
sys/dev/drm/amd/include/atombios.h
7659
UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon
sys/dev/drm/amd/include/atombios.h
766
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
7660
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
767
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
7672
UCHAR ucCL; // CAS latency
sys/dev/drm/amd/include/atombios.h
7673
UCHAR ucWL; // WRITE Latency
sys/dev/drm/amd/include/atombios.h
7674
UCHAR uctRAS; // tRAS
sys/dev/drm/amd/include/atombios.h
7675
UCHAR uctRC; // tRC
sys/dev/drm/amd/include/atombios.h
7676
UCHAR uctRFC; // tRFC
sys/dev/drm/amd/include/atombios.h
7677
UCHAR uctRCDR; // tRCDR
sys/dev/drm/amd/include/atombios.h
7678
UCHAR uctRCDW; // tRCDW
sys/dev/drm/amd/include/atombios.h
7679
UCHAR uctRP; // tRP
sys/dev/drm/amd/include/atombios.h
7680
UCHAR uctRRD; // tRRD
sys/dev/drm/amd/include/atombios.h
7681
UCHAR uctWR; // tWR
sys/dev/drm/amd/include/atombios.h
7682
UCHAR uctWTR; // tWTR
sys/dev/drm/amd/include/atombios.h
7683
UCHAR uctPDIX; // tPDIX
sys/dev/drm/amd/include/atombios.h
7684
UCHAR uctFAW; // tFAW
sys/dev/drm/amd/include/atombios.h
7685
UCHAR uctAOND; // tAOND
sys/dev/drm/amd/include/atombios.h
7686
UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon
sys/dev/drm/amd/include/atombios.h
7688
UCHAR uctCCDL; //
sys/dev/drm/amd/include/atombios.h
7689
UCHAR uctCRCRL; //
sys/dev/drm/amd/include/atombios.h
7690
UCHAR uctCRCWL; //
sys/dev/drm/amd/include/atombios.h
7691
UCHAR uctCKE; //
sys/dev/drm/amd/include/atombios.h
7692
UCHAR uctCKRSE; //
sys/dev/drm/amd/include/atombios.h
7693
UCHAR uctCKRSX; //
sys/dev/drm/amd/include/atombios.h
7694
UCHAR uctFAW32; //
sys/dev/drm/amd/include/atombios.h
7695
UCHAR ucMR5lo; //
sys/dev/drm/amd/include/atombios.h
7696
UCHAR ucMR5hi; //
sys/dev/drm/amd/include/atombios.h
7697
UCHAR ucTerminator;
sys/dev/drm/amd/include/atombios.h
7708
UCHAR ucCL; // CAS latency
sys/dev/drm/amd/include/atombios.h
7709
UCHAR ucWL; // WRITE Latency
sys/dev/drm/amd/include/atombios.h
7710
UCHAR uctRAS; // tRAS
sys/dev/drm/amd/include/atombios.h
7711
UCHAR uctRC; // tRC
sys/dev/drm/amd/include/atombios.h
7712
UCHAR uctRFC; // tRFC
sys/dev/drm/amd/include/atombios.h
7713
UCHAR uctRCDR; // tRCDR
sys/dev/drm/amd/include/atombios.h
7714
UCHAR uctRCDW; // tRCDW
sys/dev/drm/amd/include/atombios.h
7715
UCHAR uctRP; // tRP
sys/dev/drm/amd/include/atombios.h
7716
UCHAR uctRRD; // tRRD
sys/dev/drm/amd/include/atombios.h
7717
UCHAR uctWR; // tWR
sys/dev/drm/amd/include/atombios.h
7718
UCHAR uctWTR; // tWTR
sys/dev/drm/amd/include/atombios.h
7719
UCHAR uctPDIX; // tPDIX
sys/dev/drm/amd/include/atombios.h
772
UCHAR ucDispPipeId; // ATOM_CRTC1, ATOM_CRTC2, ...
sys/dev/drm/amd/include/atombios.h
7720
UCHAR uctFAW; // tFAW
sys/dev/drm/amd/include/atombios.h
7721
UCHAR uctAOND; // tAOND
sys/dev/drm/amd/include/atombios.h
7722
UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon
sys/dev/drm/amd/include/atombios.h
7724
UCHAR uctCCDL; //
sys/dev/drm/amd/include/atombios.h
7725
UCHAR uctCRCRL; //
sys/dev/drm/amd/include/atombios.h
7726
UCHAR uctCRCWL; //
sys/dev/drm/amd/include/atombios.h
7727
UCHAR uctCKE; //
sys/dev/drm/amd/include/atombios.h
7728
UCHAR uctCKRSE; //
sys/dev/drm/amd/include/atombios.h
7729
UCHAR uctCKRSX; //
sys/dev/drm/amd/include/atombios.h
773
UCHAR ucEnable; // ATOM_ENABLE/ATOM_DISABLE/ATOM_INIT
sys/dev/drm/amd/include/atombios.h
7730
UCHAR uctFAW32; //
sys/dev/drm/amd/include/atombios.h
7731
UCHAR ucMR4lo; //
sys/dev/drm/amd/include/atombios.h
7732
UCHAR ucMR4hi; //
sys/dev/drm/amd/include/atombios.h
7733
UCHAR ucMR5lo; //
sys/dev/drm/amd/include/atombios.h
7734
UCHAR ucMR5hi; //
sys/dev/drm/amd/include/atombios.h
7735
UCHAR ucTerminator;
sys/dev/drm/amd/include/atombios.h
7736
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
774
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
7751
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now;
sys/dev/drm/amd/include/atombios.h
7752
UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed
sys/dev/drm/amd/include/atombios.h
7753
UCHAR ucRow; // Number of Row,in power of 2;
sys/dev/drm/amd/include/atombios.h
7754
UCHAR ucColumn; // Number of Column,in power of 2;
sys/dev/drm/amd/include/atombios.h
7755
UCHAR ucBank; // Nunber of Bank;
sys/dev/drm/amd/include/atombios.h
7756
UCHAR ucRank; // Number of Rank, in power of 2
sys/dev/drm/amd/include/atombios.h
7757
UCHAR ucBurstSize; // burst size, 0= burst size=4 1= burst size=8
sys/dev/drm/amd/include/atombios.h
7758
UCHAR ucDllDisBit; // position of DLL Enable/Disable bit in EMRS ( Extended Mode Register )
sys/dev/drm/amd/include/atombios.h
7759
UCHAR ucRefreshRateFactor; // memory refresh rate in unit of ms
sys/dev/drm/amd/include/atombios.h
7760
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/amd/include/atombios.h
7761
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/amd/include/atombios.h
7762
UCHAR ucMemAttrib; // Memory Device Addribute, like RDBI/WDBI etc
sys/dev/drm/amd/include/atombios.h
7773
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/amd/include/atombios.h
7774
UCHAR ucChannelNum; // board dependent parameter:Number of channel;
sys/dev/drm/amd/include/atombios.h
7775
UCHAR ucChannelSize; // board dependent parameter:32bit or 64bit
sys/dev/drm/amd/include/atombios.h
7776
UCHAR ucVREFI; // board dependnt parameter: EXT or INT +160mv to -140mv
sys/dev/drm/amd/include/atombios.h
7777
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/amd/include/atombios.h
7778
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/amd/include/atombios.h
7796
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/amd/include/atombios.h
7797
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now;
sys/dev/drm/amd/include/atombios.h
7798
UCHAR ucChannelNum; // Number of channels present in this module config
sys/dev/drm/amd/include/atombios.h
7799
UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits
sys/dev/drm/amd/include/atombios.h
7800
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/amd/include/atombios.h
7801
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/amd/include/atombios.h
7802
UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8
sys/dev/drm/amd/include/atombios.h
7803
UCHAR ucVREFI; // board dependent parameter
sys/dev/drm/amd/include/atombios.h
7804
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/amd/include/atombios.h
7805
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/amd/include/atombios.h
7806
UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!!
sys/dev/drm/amd/include/atombios.h
7808
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
7819
UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed
sys/dev/drm/amd/include/atombios.h
7820
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/amd/include/atombios.h
7821
UCHAR ucReserved2[2];
sys/dev/drm/amd/include/atombios.h
783
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/amd/include/atombios.h
7838
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/amd/include/atombios.h
7839
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now;
sys/dev/drm/amd/include/atombios.h
784
UCHAR ucPadding[3];
sys/dev/drm/amd/include/atombios.h
7840
UCHAR ucChannelNum; // Number of channels present in this module config
sys/dev/drm/amd/include/atombios.h
7841
UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits
sys/dev/drm/amd/include/atombios.h
7842
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/amd/include/atombios.h
7843
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/amd/include/atombios.h
7844
UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8
sys/dev/drm/amd/include/atombios.h
7845
UCHAR ucVREFI; // board dependent parameter
sys/dev/drm/amd/include/atombios.h
7846
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/amd/include/atombios.h
7847
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/amd/include/atombios.h
7848
UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!!
sys/dev/drm/amd/include/atombios.h
7850
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
7855
UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed
sys/dev/drm/amd/include/atombios.h
7856
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/amd/include/atombios.h
7857
UCHAR ucFIFODepth; // FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth
sys/dev/drm/amd/include/atombios.h
7858
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/amd/include/atombios.h
7870
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/amd/include/atombios.h
7871
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now;
sys/dev/drm/amd/include/atombios.h
7872
UCHAR ucChannelNum; // Number of channels present in this module config
sys/dev/drm/amd/include/atombios.h
7873
UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits
sys/dev/drm/amd/include/atombios.h
7874
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/amd/include/atombios.h
7875
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/amd/include/atombios.h
7876
UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8
sys/dev/drm/amd/include/atombios.h
7877
UCHAR ucVREFI; // board dependent parameter
sys/dev/drm/amd/include/atombios.h
7878
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/amd/include/atombios.h
7879
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/amd/include/atombios.h
7880
UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!!
sys/dev/drm/amd/include/atombios.h
7882
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
7887
UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed
sys/dev/drm/amd/include/atombios.h
7888
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/amd/include/atombios.h
7889
UCHAR ucFIFODepth; // FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth
sys/dev/drm/amd/include/atombios.h
7890
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/amd/include/atombios.h
7901
UCHAR ucExtMemoryID; // Current memory module ID
sys/dev/drm/amd/include/atombios.h
7902
UCHAR ucMemoryType; // MEM_TYPE_DDR2/DDR3/GDDR3/GDDR5
sys/dev/drm/amd/include/atombios.h
7903
UCHAR ucChannelNum; // Number of mem. channels supported in this module
sys/dev/drm/amd/include/atombios.h
7904
UCHAR ucChannelWidth; // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT
sys/dev/drm/amd/include/atombios.h
7905
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/amd/include/atombios.h
7906
UCHAR ucReserve; // In MC7x, the lower 4 bits are used as bit8-11 of memory size. In other MC code, it's not used.
sys/dev/drm/amd/include/atombios.h
7907
UCHAR ucMisc; // RANK_OF_THISMEMORY etc.
sys/dev/drm/amd/include/atombios.h
7908
UCHAR ucVREFI; // Not used.
sys/dev/drm/amd/include/atombios.h
7909
UCHAR ucNPL_RT; // Round trip delay (MC_SEQ_CAS_TIMING [28:24]:TCL=CL+NPL_RT-2). Always 2.
sys/dev/drm/amd/include/atombios.h
7910
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/amd/include/atombios.h
7911
UCHAR ucMemorySize; // Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros
sys/dev/drm/amd/include/atombios.h
7913
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
7917
UCHAR ucMemoryVenderID; // [7:4] Revision, [3:0] Vendor code
sys/dev/drm/amd/include/atombios.h
7918
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/amd/include/atombios.h
7919
UCHAR ucFIFODepth; // FIFO depth can be detected during vendor detection, here is hardcoded per memory
sys/dev/drm/amd/include/atombios.h
7920
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/amd/include/atombios.h
7932
UCHAR ucExtMemoryID; // Current memory module ID
sys/dev/drm/amd/include/atombios.h
7933
UCHAR ucMemoryType; // MEM_TYPE_DDR2/DDR3/GDDR3/GDDR5
sys/dev/drm/amd/include/atombios.h
7934
UCHAR ucChannelNum; // Number of mem. channels supported in this module
sys/dev/drm/amd/include/atombios.h
7935
UCHAR ucChannelWidth; // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT
sys/dev/drm/amd/include/atombios.h
7936
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/amd/include/atombios.h
7937
UCHAR ucBankCol; // bit[3:2]= BANK ( =2:16bank, =1:8bank, =0:4bank ) bit[1:0]=Col ( =2: 10 bit, =1:9bit, =0:8bit )
sys/dev/drm/amd/include/atombios.h
7938
UCHAR ucMisc; // RANK_OF_THISMEMORY etc.
sys/dev/drm/amd/include/atombios.h
7939
UCHAR ucVREFI; // Not used.
sys/dev/drm/amd/include/atombios.h
794
UCHAR ucDacType; //{ATOM_DAC_A,ATOM_DAC_B, ATOM_EXT_DAC}
sys/dev/drm/amd/include/atombios.h
7942
UCHAR ucMcTunningSetId; // MC phy registers set per.
sys/dev/drm/amd/include/atombios.h
7943
UCHAR ucRowNum;
sys/dev/drm/amd/include/atombios.h
7947
UCHAR ucMemoryVenderID; // [7:4] Revision, [3:0] Vendor code
sys/dev/drm/amd/include/atombios.h
7948
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/amd/include/atombios.h
7949
UCHAR ucFIFODepth; // FIFO depth can be detected during vendor detection, here is hardcoded per memory
sys/dev/drm/amd/include/atombios.h
795
UCHAR ucMisc; //Valid only when table revision =1.3 and above
sys/dev/drm/amd/include/atombios.h
7950
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/amd/include/atombios.h
7962
UCHAR ucNumOfVRAMModule;
sys/dev/drm/amd/include/atombios.h
7972
UCHAR aVID_PinsShift[9]; // 8 bit strap maximum+terminator
sys/dev/drm/amd/include/atombios.h
7973
UCHAR ucNumOfVRAMModule;
sys/dev/drm/amd/include/atombios.h
7987
UCHAR ucMemDQ7_0ByteRemap; // DQ line byte remap, =0: Memory Data line BYTE0, =1: BYTE1, =2: BYTE2, =3: BYTE3
sys/dev/drm/amd/include/atombios.h
7989
UCHAR ucReservde[4];
sys/dev/drm/amd/include/atombios.h
7990
UCHAR ucNumOfVRAMModule;
sys/dev/drm/amd/include/atombios.h
8002
UCHAR ucNumOfVRAMModule; // indicate number of VRAM module
sys/dev/drm/amd/include/atombios.h
8003
UCHAR ucMemoryClkPatchTblVer; // version of memory AC timing register list
sys/dev/drm/amd/include/atombios.h
8004
UCHAR ucVramModuleVer; // indicate ATOM_VRAM_MODUE version
sys/dev/drm/amd/include/atombios.h
8005
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
8018
UCHAR ucNumOfVRAMModule; // indicate number of VRAM module
sys/dev/drm/amd/include/atombios.h
8019
UCHAR ucMemoryClkPatchTblVer; // version of memory AC timing register list
sys/dev/drm/amd/include/atombios.h
8020
UCHAR ucVramModuleVer; // indicate ATOM_VRAM_MODUE version
sys/dev/drm/amd/include/atombios.h
8021
UCHAR ucMcPhyTileNum; // indicate the MCD tile number which use in DramDataRemapTbl and usMcAdjustPerTileTblOffset
sys/dev/drm/amd/include/atombios.h
8028
UCHAR ucByteRemapCh0;
sys/dev/drm/amd/include/atombios.h
8029
UCHAR ucByteRemapCh1;
sys/dev/drm/amd/include/atombios.h
8043
UCHAR aVID_PinsShift[9]; // 8 bit strap maximum+terminator
sys/dev/drm/amd/include/atombios.h
8050
UCHAR ucTrainingLoop;
sys/dev/drm/amd/include/atombios.h
8051
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
8069
UCHAR ucControl;
sys/dev/drm/amd/include/atombios.h
8070
UCHAR ucData;
sys/dev/drm/amd/include/atombios.h
8071
UCHAR ucSatus;
sys/dev/drm/amd/include/atombios.h
8072
UCHAR ucTemp;
sys/dev/drm/amd/include/atombios.h
8080
UCHAR ucAct;
sys/dev/drm/amd/include/atombios.h
8081
UCHAR ucData;
sys/dev/drm/amd/include/atombios.h
8127
UCHAR VbeSignature[4];
sys/dev/drm/amd/include/atombios.h
813
UCHAR ucDacStandard; // See definition of ATOM_DACx_xxx, For DEC3.0, bit 7 used as internal flag to indicate DAC2 (==1) or DAC1 (==0)
sys/dev/drm/amd/include/atombios.h
8130
UCHAR Capabilities[4];
sys/dev/drm/amd/include/atombios.h
814
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/amd/include/atombios.h
8154
UCHAR Reserved[222];
sys/dev/drm/amd/include/atombios.h
8155
UCHAR OemData[256];
sys/dev/drm/amd/include/atombios.h
8163
UCHAR RedBPP;
sys/dev/drm/amd/include/atombios.h
8164
UCHAR GreenBPP;
sys/dev/drm/amd/include/atombios.h
8165
UCHAR BlueBPP;
sys/dev/drm/amd/include/atombios.h
8166
UCHAR ReservedBPP;
sys/dev/drm/amd/include/atombios.h
8169
UCHAR Reserved[14];
sys/dev/drm/amd/include/atombios.h
8176
UCHAR WinAAttributes; // db ? ; window A attributes
sys/dev/drm/amd/include/atombios.h
8177
UCHAR WinBAttributes; // db ? ; window B attributes
sys/dev/drm/amd/include/atombios.h
8188
UCHAR XCharSize; // db ? ; character cell width in pixels
sys/dev/drm/amd/include/atombios.h
8189
UCHAR YCharSize; // db ? ; character cell height in pixels
sys/dev/drm/amd/include/atombios.h
8190
UCHAR NumberOfPlanes; // db ? ; number of memory planes
sys/dev/drm/amd/include/atombios.h
8191
UCHAR BitsPerPixel; // db ? ; bits per pixel
sys/dev/drm/amd/include/atombios.h
8192
UCHAR NumberOfBanks; // db ? ; number of banks
sys/dev/drm/amd/include/atombios.h
8193
UCHAR MemoryModel; // db ? ; memory model type
sys/dev/drm/amd/include/atombios.h
8194
UCHAR BankSize; // db ? ; bank size in KB
sys/dev/drm/amd/include/atombios.h
8195
UCHAR NumberOfImagePages;// db ? ; number of images
sys/dev/drm/amd/include/atombios.h
8196
UCHAR ReservedForPageFunction;//db 1 ; reserved for page function
sys/dev/drm/amd/include/atombios.h
8199
UCHAR RedMaskSize; // db ? ; size of direct color red mask in bits
sys/dev/drm/amd/include/atombios.h
8200
UCHAR RedFieldPosition; // db ? ; bit position of lsb of red mask
sys/dev/drm/amd/include/atombios.h
8201
UCHAR GreenMaskSize; // db ? ; size of direct color green mask in bits
sys/dev/drm/amd/include/atombios.h
8202
UCHAR GreenFieldPosition; // db ? ; bit position of lsb of green mask
sys/dev/drm/amd/include/atombios.h
8203
UCHAR BlueMaskSize; // db ? ; size of direct color blue mask in bits
sys/dev/drm/amd/include/atombios.h
8204
UCHAR BlueFieldPosition; // db ? ; bit position of lsb of blue mask
sys/dev/drm/amd/include/atombios.h
8205
UCHAR RsvdMaskSize; // db ? ; size of direct color reserved mask in bits
sys/dev/drm/amd/include/atombios.h
8206
UCHAR RsvdFieldPosition; // db ? ; bit position of lsb of reserved mask
sys/dev/drm/amd/include/atombios.h
8207
UCHAR DirectColorModeInfo;// db ? ; direct color mode attributes
sys/dev/drm/amd/include/atombios.h
8216
UCHAR BnkNumberOfImagePages;// db ? ; number of images for banked modes
sys/dev/drm/amd/include/atombios.h
8217
UCHAR LinNumberOfImagPages; // db ? ; number of images for linear modes
sys/dev/drm/amd/include/atombios.h
8218
UCHAR LinRedMaskSize; // db ? ; size of direct color red mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8219
UCHAR LinRedFieldPosition; // db ? ; bit position of lsb of red mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8220
UCHAR LinGreenMaskSize; // db ? ; size of direct color green mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8221
UCHAR LinGreenFieldPosition;// db ? ; bit position of lsb of green mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8222
UCHAR LinBlueMaskSize; // db ? ; size of direct color blue mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8223
UCHAR LinBlueFieldPosition; // db ? ; bit position of lsb of blue mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8224
UCHAR LinRsvdMaskSize; // db ? ; size of direct color reserved mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8225
UCHAR LinRsvdFieldPosition; // db ? ; bit position of lsb of reserved mask(linear modes)
sys/dev/drm/amd/include/atombios.h
8227
UCHAR Reserved; // db 190 dup (0)
sys/dev/drm/amd/include/atombios.h
8283
UCHAR ucTransmitterCmdTblId;
sys/dev/drm/amd/include/atombios.h
8284
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
8285
UCHAR ucEncoderID; //available 1st encoder ( default )
sys/dev/drm/amd/include/atombios.h
8286
UCHAR ucOptionEncoderID; //available 2nd encoder ( optional )
sys/dev/drm/amd/include/atombios.h
8287
UCHAR uc2ndEncoderID;
sys/dev/drm/amd/include/atombios.h
8288
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
829
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
8303
UCHAR ucEncoderID;
sys/dev/drm/amd/include/atombios.h
8304
UCHAR ucEncoderConfig;
sys/dev/drm/amd/include/atombios.h
8330
UCHAR ucPpllId;
sys/dev/drm/amd/include/atombios.h
8331
UCHAR ucPpllAttribute;
sys/dev/drm/amd/include/atombios.h
8344
UCHAR ucTransmitterCmdTblId;
sys/dev/drm/amd/include/atombios.h
8345
UCHAR ucConfig;
sys/dev/drm/amd/include/atombios.h
8346
UCHAR ucEncoderID; // available 1st encoder ( default )
sys/dev/drm/amd/include/atombios.h
8347
UCHAR ucOptionEncoderID; // available 2nd encoder ( optional )
sys/dev/drm/amd/include/atombios.h
8348
UCHAR uc2ndEncoderID;
sys/dev/drm/amd/include/atombios.h
8349
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
8359
UCHAR ucDCERevision;
sys/dev/drm/amd/include/atombios.h
8360
UCHAR ucMaxDispEngineNum;
sys/dev/drm/amd/include/atombios.h
8361
UCHAR ucMaxActiveDispEngineNum;
sys/dev/drm/amd/include/atombios.h
8362
UCHAR ucMaxPPLLNum;
sys/dev/drm/amd/include/atombios.h
8363
UCHAR ucCoreRefClkSource; // value of CORE_REF_CLK_SOURCE
sys/dev/drm/amd/include/atombios.h
8364
UCHAR ucDispCaps;
sys/dev/drm/amd/include/atombios.h
8365
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
837
UCHAR ucAction; // =0: turn off encoder
sys/dev/drm/amd/include/atombios.h
839
UCHAR ucEncoderMode;
sys/dev/drm/amd/include/atombios.h
8391
UCHAR ucChannelID;
sys/dev/drm/amd/include/atombios.h
8394
UCHAR ucReplyStatus;
sys/dev/drm/amd/include/atombios.h
8395
UCHAR ucDelay;
sys/dev/drm/amd/include/atombios.h
8397
UCHAR ucDataOutLen;
sys/dev/drm/amd/include/atombios.h
8398
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
8406
UCHAR ucChannelID;
sys/dev/drm/amd/include/atombios.h
8409
UCHAR ucReplyStatus;
sys/dev/drm/amd/include/atombios.h
8410
UCHAR ucDelay;
sys/dev/drm/amd/include/atombios.h
8412
UCHAR ucDataOutLen;
sys/dev/drm/amd/include/atombios.h
8413
UCHAR ucHPD_ID; //=0: HPD1, =1: HPD2, =2: HPD3, =3: HPD4, =4: HPD5, =5: HPD6
sys/dev/drm/amd/include/atombios.h
8425
UCHAR ucConfig; // for DP training command
sys/dev/drm/amd/include/atombios.h
8426
UCHAR ucI2cId; // use for GET_SINK_TYPE command
sys/dev/drm/amd/include/atombios.h
8428
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
8429
UCHAR ucStatus;
sys/dev/drm/amd/include/atombios.h
8430
UCHAR ucLaneNum;
sys/dev/drm/amd/include/atombios.h
8431
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
8443
UCHAR ucAuxId;
sys/dev/drm/amd/include/atombios.h
8444
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
8445
UCHAR ucSinkType; // Iput and Output parameters.
sys/dev/drm/amd/include/atombios.h
8446
UCHAR ucHPDId; // Input parameter, used when ucAction = DP_SERVICE_V2_ACTION_DET_EXT_CONNECTION
sys/dev/drm/amd/include/atombios.h
8447
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
845
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/amd/include/atombios.h
846
UCHAR ucReserved[2];
sys/dev/drm/amd/include/atombios.h
8479
UCHAR ucI2CSpeed;
sys/dev/drm/amd/include/atombios.h
8482
UCHAR ucRegIndex;
sys/dev/drm/amd/include/atombios.h
8483
UCHAR ucStatus;
sys/dev/drm/amd/include/atombios.h
8486
UCHAR ucFlag;
sys/dev/drm/amd/include/atombios.h
8487
UCHAR ucTransBytes;
sys/dev/drm/amd/include/atombios.h
8488
UCHAR ucSlaveAddr;
sys/dev/drm/amd/include/atombios.h
8489
UCHAR ucLineNumber;
sys/dev/drm/amd/include/atombios.h
8504
UCHAR ucCmd; // Input: To tell which action to take
sys/dev/drm/amd/include/atombios.h
8505
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
8511
UCHAR ucReturnCode; // Output: Return value base on action was taken
sys/dev/drm/amd/include/atombios.h
8512
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
8534
UCHAR ucHWBlkInst; // HW block instance, 0, 1, 2, ...
sys/dev/drm/amd/include/atombios.h
8535
UCHAR ucReserved[3];
sys/dev/drm/amd/include/atombios.h
8594
UCHAR ucStartBit;
sys/dev/drm/amd/include/atombios.h
8595
UCHAR ucEndBit;
sys/dev/drm/amd/include/atombios.h
8600
UCHAR ucEncodeMode;
sys/dev/drm/amd/include/atombios.h
8601
UCHAR ucPhySel;
sys/dev/drm/amd/include/atombios.h
8617
UCHAR ucCondition2;
sys/dev/drm/amd/include/atombios.h
8634
UCHAR ucEncodeMode;
sys/dev/drm/amd/include/atombios.h
8635
UCHAR ucPhySel;
sys/dev/drm/amd/include/atombios.h
8641
UCHAR ucEncodeMode;
sys/dev/drm/amd/include/atombios.h
8642
UCHAR ucPhySel;
sys/dev/drm/amd/include/atombios.h
8649
UCHAR ucGfxBlkId; //GFX blk id to be harvested, like CU, RB or PRIM
sys/dev/drm/amd/include/atombios.h
8650
UCHAR ucReserved; //reserved
sys/dev/drm/amd/include/atombios.h
8651
UCHAR ucActiveUnitNumPerSH; //requested active CU/RB/PRIM number per shader array
sys/dev/drm/amd/include/atombios.h
8652
UCHAR ucMaxUnitNumPerSH; //max CU/RB/PRIM number per shader array
sys/dev/drm/amd/include/atombios.h
8662
UCHAR PciRomSignature[2];
sys/dev/drm/amd/include/atombios.h
8663
UCHAR ucPciRomSizeIn512bytes;
sys/dev/drm/amd/include/atombios.h
8664
UCHAR ucJumpCoreMainInitBIOS;
sys/dev/drm/amd/include/atombios.h
8666
UCHAR PciReservedSpace[18];
sys/dev/drm/amd/include/atombios.h
8668
UCHAR Rsvd1d_1a[4];
sys/dev/drm/amd/include/atombios.h
8670
UCHAR CheckSum[14];
sys/dev/drm/amd/include/atombios.h
8671
UCHAR ucBiosMsgNumber;
sys/dev/drm/amd/include/atombios.h
8675
UCHAR ucSpeicalPostImageSizeIn512Bytes;
sys/dev/drm/amd/include/atombios.h
8676
UCHAR Rsved47_45[3];
sys/dev/drm/amd/include/atombios.h
8678
UCHAR Rsved4f_4a[6];
sys/dev/drm/amd/include/atombios.h
8680
UCHAR ucJumpCoreXFuncFarHandler;
sys/dev/drm/amd/include/atombios.h
8682
UCHAR ucRsved67;
sys/dev/drm/amd/include/atombios.h
8683
UCHAR ucJumpCoreVFuncFarHandler;
sys/dev/drm/amd/include/atombios.h
8685
UCHAR Rsved6d_6b[3];
sys/dev/drm/amd/include/atombios.h
8729
UCHAR ucDAC1_BG_Adjustment;
sys/dev/drm/amd/include/atombios.h
8730
UCHAR ucDAC1_DAC_Adjustment;
sys/dev/drm/amd/include/atombios.h
8733
UCHAR ucDAC2_CRT2_BG_Adjustment;
sys/dev/drm/amd/include/atombios.h
8734
UCHAR ucDAC2_CRT2_DAC_Adjustment;
sys/dev/drm/amd/include/atombios.h
8737
UCHAR ucDAC2_CRT2_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low
sys/dev/drm/amd/include/atombios.h
8738
UCHAR ucDAC2_NTSC_BG_Adjustment;
sys/dev/drm/amd/include/atombios.h
8739
UCHAR ucDAC2_NTSC_DAC_Adjustment;
sys/dev/drm/amd/include/atombios.h
8742
UCHAR ucDAC2_TV1_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low
sys/dev/drm/amd/include/atombios.h
8743
UCHAR ucDAC2_CV_BG_Adjustment;
sys/dev/drm/amd/include/atombios.h
8744
UCHAR ucDAC2_CV_DAC_Adjustment;
sys/dev/drm/amd/include/atombios.h
8747
UCHAR ucDAC2_CV_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low
sys/dev/drm/amd/include/atombios.h
8748
UCHAR ucDAC2_PAL_BG_Adjustment;
sys/dev/drm/amd/include/atombios.h
8749
UCHAR ucDAC2_PAL_DAC_Adjustment;
sys/dev/drm/amd/include/atombios.h
8780
UCHAR bfConnectorType:4;
sys/dev/drm/amd/include/atombios.h
8781
UCHAR bfAssociatedDAC:4;
sys/dev/drm/amd/include/atombios.h
8783
UCHAR bfAssociatedDAC:4;
sys/dev/drm/amd/include/atombios.h
8784
UCHAR bfConnectorType:4;
sys/dev/drm/amd/include/atombios.h
8791
UCHAR ucAccess;
sys/dev/drm/amd/include/atombios.h
8812
UCHAR ucIntSrcBitmap;
sys/dev/drm/amd/include/atombios.h
8838
UCHAR ucPLL_ChargePump; // PLL charge-pump gain control
sys/dev/drm/amd/include/atombios.h
8839
UCHAR ucPLL_DutyCycle; // PLL duty cycle control
sys/dev/drm/amd/include/atombios.h
8840
UCHAR ucPLL_VCO_Gain; // PLL VCO gain control
sys/dev/drm/amd/include/atombios.h
8841
UCHAR ucPLL_VoltageSwing; // PLL driver voltage swing control
sys/dev/drm/amd/include/atombios.h
8857
UCHAR ucTVStandard; //Same as TV standards defined above,
sys/dev/drm/amd/include/atombios.h
8858
UCHAR ucPadding[1];
sys/dev/drm/amd/include/atombios.h
8863
UCHAR ucAttribute; //Same as other digital encoder attributes defined above
sys/dev/drm/amd/include/atombios.h
8864
UCHAR ucPadding[1];
sys/dev/drm/amd/include/atombios.h
8878
UCHAR ucDeviceType; //Use ATOM_DEVICE_xxx1_Index to indicate device type only.
sys/dev/drm/amd/include/atombios.h
8879
UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT
sys/dev/drm/amd/include/atombios.h
889
UCHAR ucReserved1:2;
sys/dev/drm/amd/include/atombios.h
890
UCHAR ucTransmitterSel:2; // =0: UniphyAB, =1: UniphyCD =2: UniphyEF
sys/dev/drm/amd/include/atombios.h
8903
UCHAR ucXtransimitterID;
sys/dev/drm/amd/include/atombios.h
8904
UCHAR ucSupportedLink; // Bit field, bit0=1, single link supported;bit1=1,dual link supported
sys/dev/drm/amd/include/atombios.h
8905
UCHAR ucSequnceAlterID; // Even with the same external TMDS asic, it's possible that the program seqence alters
sys/dev/drm/amd/include/atombios.h
8907
UCHAR ucMasterAddress; // Address to control Master xTMDS Chip
sys/dev/drm/amd/include/atombios.h
8908
UCHAR ucSlaveAddress; // Address to control Slave xTMDS Chip
sys/dev/drm/amd/include/atombios.h
891
UCHAR ucLinkSel:1; // =0: linkA/C/E =1: linkB/D/F
sys/dev/drm/amd/include/atombios.h
8913
UCHAR ucEnable; // ATOM_ENABLE=On or ATOM_DISABLE=Off
sys/dev/drm/amd/include/atombios.h
8914
UCHAR ucDevice; // ATOM_DEVICE_DFP1_INDEX....
sys/dev/drm/amd/include/atombios.h
8915
UCHAR ucPadding[2];
sys/dev/drm/amd/include/atombios.h
892
UCHAR ucReserved:1;
sys/dev/drm/amd/include/atombios.h
893
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/amd/include/atombios.h
895
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/amd/include/atombios.h
896
UCHAR ucReserved:1;
sys/dev/drm/amd/include/atombios.h
897
UCHAR ucLinkSel:1; // =0: linkA/C/E =1: linkB/D/F
sys/dev/drm/amd/include/atombios.h
898
UCHAR ucTransmitterSel:2; // =0: UniphyAB, =1: UniphyCD =2: UniphyEF
sys/dev/drm/amd/include/atombios.h
8983
UCHAR ucVoltageDropIndex; // index to GPIO table
sys/dev/drm/amd/include/atombios.h
8984
UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate
sys/dev/drm/amd/include/atombios.h
8985
UCHAR ucMinTemperature;
sys/dev/drm/amd/include/atombios.h
8986
UCHAR ucMaxTemperature;
sys/dev/drm/amd/include/atombios.h
8987
UCHAR ucNumPciELanes; // number of PCIE lanes
sys/dev/drm/amd/include/atombios.h
899
UCHAR ucReserved1:2;
sys/dev/drm/amd/include/atombios.h
8998
UCHAR ucVoltageDropIndex; // index to GPIO table
sys/dev/drm/amd/include/atombios.h
8999
UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate
sys/dev/drm/amd/include/atombios.h
9000
UCHAR ucMinTemperature;
sys/dev/drm/amd/include/atombios.h
9001
UCHAR ucMaxTemperature;
sys/dev/drm/amd/include/atombios.h
9002
UCHAR ucNumPciELanes; // number of PCIE lanes
sys/dev/drm/amd/include/atombios.h
9013
UCHAR ucVoltageDropIndex; // index to Core (VDDC) votage table
sys/dev/drm/amd/include/atombios.h
9014
UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate
sys/dev/drm/amd/include/atombios.h
9015
UCHAR ucMinTemperature;
sys/dev/drm/amd/include/atombios.h
9016
UCHAR ucMaxTemperature;
sys/dev/drm/amd/include/atombios.h
9017
UCHAR ucNumPciELanes; // number of PCIE lanes
sys/dev/drm/amd/include/atombios.h
9018
UCHAR ucVDDCI_VoltageDropIndex; // index to VDDCI votage table
sys/dev/drm/amd/include/atombios.h
9039
UCHAR ucOverdriveThermalController;
sys/dev/drm/amd/include/atombios.h
9040
UCHAR ucOverdriveI2cLine;
sys/dev/drm/amd/include/atombios.h
9041
UCHAR ucOverdriveIntBitmap;
sys/dev/drm/amd/include/atombios.h
9042
UCHAR ucOverdriveControllerAddress;
sys/dev/drm/amd/include/atombios.h
9043
UCHAR ucSizeOfPowerModeEntry;
sys/dev/drm/amd/include/atombios.h
9044
UCHAR ucNumOfPowerModeEntries;
sys/dev/drm/amd/include/atombios.h
9051
UCHAR ucOverdriveThermalController;
sys/dev/drm/amd/include/atombios.h
9052
UCHAR ucOverdriveI2cLine;
sys/dev/drm/amd/include/atombios.h
9053
UCHAR ucOverdriveIntBitmap;
sys/dev/drm/amd/include/atombios.h
9054
UCHAR ucOverdriveControllerAddress;
sys/dev/drm/amd/include/atombios.h
9055
UCHAR ucSizeOfPowerModeEntry;
sys/dev/drm/amd/include/atombios.h
9056
UCHAR ucNumOfPowerModeEntries;
sys/dev/drm/amd/include/atombios.h
9063
UCHAR ucOverdriveThermalController;
sys/dev/drm/amd/include/atombios.h
9064
UCHAR ucOverdriveI2cLine;
sys/dev/drm/amd/include/atombios.h
9065
UCHAR ucOverdriveIntBitmap;
sys/dev/drm/amd/include/atombios.h
9066
UCHAR ucOverdriveControllerAddress;
sys/dev/drm/amd/include/atombios.h
9067
UCHAR ucSizeOfPowerModeEntry;
sys/dev/drm/amd/include/atombios.h
9068
UCHAR ucNumOfPowerModeEntries;
sys/dev/drm/amd/include/atombios.h
908
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
909
UCHAR ucEncoderMode;
sys/dev/drm/amd/include/atombios.h
915
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/amd/include/atombios.h
916
UCHAR ucStatus; // = DP_LINK_TRAINING_COMPLETE or DP_LINK_TRAINING_INCOMPLETE, only used by VBIOS with command ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS
sys/dev/drm/amd/include/atombios.h
917
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
9203
UCHAR ucRevision; // Holes set revision
sys/dev/drm/amd/include/atombios.h
9204
UCHAR ucAlgorithm; // Hash algorithm
sys/dev/drm/amd/include/atombios.h
9205
UCHAR ucSignatureType; // Signature type ( 0 - no signature, 1 - test, 2 - production )
sys/dev/drm/amd/include/atombios.h
9206
UCHAR ucReserved;
sys/dev/drm/amd/include/atombios.h
9216
UCHAR ucholesNo; // number of holes that follow
sys/dev/drm/amd/include/atombios.h
9232
UCHAR Revision;
sys/dev/drm/amd/include/atombios.h
9233
UCHAR Checksum;
sys/dev/drm/amd/include/atombios.h
9234
UCHAR OemId[6];
sys/dev/drm/amd/include/atombios.h
9235
UCHAR OemTableId[8]; //UINT64 OemTableId;
sys/dev/drm/amd/include/atombios.h
9256
UCHAR TableUUID[16]; //0x24
sys/dev/drm/amd/include/atombios.h
9277
UCHAR VbiosContent[1];
sys/dev/drm/amd/include/atombios.h
9282
UCHAR Lib1Content[1];
sys/dev/drm/amd/include/atombios.h
962
UCHAR ucReserved1:1;
sys/dev/drm/amd/include/atombios.h
963
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/amd/include/atombios.h
964
UCHAR ucReserved:3;
sys/dev/drm/amd/include/atombios.h
965
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/amd/include/atombios.h
967
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/amd/include/atombios.h
968
UCHAR ucReserved:3;
sys/dev/drm/amd/include/atombios.h
969
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/amd/include/atombios.h
970
UCHAR ucReserved1:1;
sys/dev/drm/amd/include/atombios.h
989
UCHAR ucAction;
sys/dev/drm/amd/include/atombios.h
991
UCHAR ucEncoderMode;
sys/dev/drm/amd/include/atombios.h
998
UCHAR ucPanelMode; // only valid when ucAction == ATOM_ENCODER_CMD_SETUP_PANEL_MODE
sys/dev/drm/amd/include/pptable.h
106
UCHAR ucFanControlMode;
sys/dev/drm/amd/include/pptable.h
178
UCHAR ucDataRevision;
sys/dev/drm/amd/include/pptable.h
180
UCHAR ucNumStates;
sys/dev/drm/amd/include/pptable.h
181
UCHAR ucStateEntrySize;
sys/dev/drm/amd/include/pptable.h
182
UCHAR ucClockInfoSize;
sys/dev/drm/amd/include/pptable.h
183
UCHAR ucNonClockSize;
sys/dev/drm/amd/include/pptable.h
211
UCHAR ucNumCustomThermalPolicy;
sys/dev/drm/amd/include/pptable.h
31
UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_*
sys/dev/drm/amd/include/pptable.h
315
UCHAR ucMinTemperature;
sys/dev/drm/amd/include/pptable.h
316
UCHAR ucMaxTemperature;
sys/dev/drm/amd/include/pptable.h
317
UCHAR ucThermalAction;
sys/dev/drm/amd/include/pptable.h
32
UCHAR ucI2cLine; // as interpreted by DAL I2C
sys/dev/drm/amd/include/pptable.h
328
UCHAR ucMinTemperature;
sys/dev/drm/amd/include/pptable.h
329
UCHAR ucMaxTemperature;
sys/dev/drm/amd/include/pptable.h
33
UCHAR ucI2cAddress;
sys/dev/drm/amd/include/pptable.h
331
UCHAR ucRequiredPower;
sys/dev/drm/amd/include/pptable.h
335
UCHAR ucUnused[5];
sys/dev/drm/amd/include/pptable.h
34
UCHAR ucFanParameters; // Fan Control Parameters.
sys/dev/drm/amd/include/pptable.h
344
UCHAR ucEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
347
UCHAR ucMemoryClockHigh;
sys/dev/drm/amd/include/pptable.h
35
UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
sys/dev/drm/amd/include/pptable.h
36
UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
sys/dev/drm/amd/include/pptable.h
369
UCHAR ucLowEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
37
UCHAR ucReserved; // ----
sys/dev/drm/amd/include/pptable.h
371
UCHAR ucHighEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
373
UCHAR ucMemoryClockHigh; // Currentyl unused.
sys/dev/drm/amd/include/pptable.h
374
UCHAR ucPadding; // For proper alignment and size.
sys/dev/drm/amd/include/pptable.h
376
UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16}
sys/dev/drm/amd/include/pptable.h
377
UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could
sys/dev/drm/amd/include/pptable.h
38
UCHAR ucFlags; // to be defined
sys/dev/drm/amd/include/pptable.h
398
UCHAR ucEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
401
UCHAR ucMemoryClockHigh;
sys/dev/drm/amd/include/pptable.h
414
UCHAR ucEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
417
UCHAR ucMemoryClockHigh;
sys/dev/drm/amd/include/pptable.h
421
UCHAR ucPCIEGen;
sys/dev/drm/amd/include/pptable.h
422
UCHAR ucUnused1;
sys/dev/drm/amd/include/pptable.h
431
UCHAR ucEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
434
UCHAR ucMemoryClockHigh;
sys/dev/drm/amd/include/pptable.h
436
UCHAR ucPCIEGen;
sys/dev/drm/amd/include/pptable.h
442
UCHAR ucEngineClockHigh; //clockfrequency >> 16.
sys/dev/drm/amd/include/pptable.h
443
UCHAR vddcIndex; //2-bit vddc index;
sys/dev/drm/amd/include/pptable.h
453
UCHAR ucEngineClockHigh;
sys/dev/drm/amd/include/pptable.h
454
UCHAR vddcIndex;
sys/dev/drm/amd/include/pptable.h
461
UCHAR index;
sys/dev/drm/amd/include/pptable.h
462
UCHAR rsv[3];
sys/dev/drm/amd/include/pptable.h
469
UCHAR ucNumDPMLevels;
sys/dev/drm/amd/include/pptable.h
472
UCHAR nonClockInfoIndex;
sys/dev/drm/amd/include/pptable.h
476
UCHAR clockInfoIndex[1];
sys/dev/drm/amd/include/pptable.h
481
UCHAR ucNumEntries;
sys/dev/drm/amd/include/pptable.h
489
UCHAR ucNumEntries;
sys/dev/drm/amd/include/pptable.h
492
UCHAR ucEntrySize;
sys/dev/drm/amd/include/pptable.h
494
UCHAR clockInfo[1];
sys/dev/drm/amd/include/pptable.h
500
UCHAR ucNumEntries;
sys/dev/drm/amd/include/pptable.h
502
UCHAR ucEntrySize;
sys/dev/drm/amd/include/pptable.h
510
UCHAR ucClockHigh;
sys/dev/drm/amd/include/pptable.h
516
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/amd/include/pptable.h
523
UCHAR ucSclkHigh;
sys/dev/drm/amd/include/pptable.h
525
UCHAR ucMclkHigh;
sys/dev/drm/amd/include/pptable.h
532
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/amd/include/pptable.h
556
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/amd/include/pptable.h
564
UCHAR ucSclkHigh;
sys/dev/drm/amd/include/pptable.h
566
UCHAR ucMclkHigh;
sys/dev/drm/amd/include/pptable.h
571
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/amd/include/pptable.h
577
UCHAR ucEVClkHigh;
sys/dev/drm/amd/include/pptable.h
579
UCHAR ucECClkHigh;
sys/dev/drm/amd/include/pptable.h
583
UCHAR ucNumEntries;
sys/dev/drm/amd/include/pptable.h
590
UCHAR ucVCEClockInfoIndex;
sys/dev/drm/amd/include/pptable.h
595
UCHAR numEntries;
sys/dev/drm/amd/include/pptable.h
601
UCHAR ucVCEClockInfoIndex;
sys/dev/drm/amd/include/pptable.h
602
UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
sys/dev/drm/amd/include/pptable.h
607
UCHAR numEntries;
sys/dev/drm/amd/include/pptable.h
614
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
623
UCHAR ucVClkHigh;
sys/dev/drm/amd/include/pptable.h
625
UCHAR ucDClkHigh;
sys/dev/drm/amd/include/pptable.h
629
UCHAR ucNumEntries;
sys/dev/drm/amd/include/pptable.h
636
UCHAR ucUVDClockInfoIndex;
sys/dev/drm/amd/include/pptable.h
641
UCHAR numEntries;
sys/dev/drm/amd/include/pptable.h
647
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
656
UCHAR ucSAMClockHigh;
sys/dev/drm/amd/include/pptable.h
660
UCHAR numEntries;
sys/dev/drm/amd/include/pptable.h
666
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
674
UCHAR ucACPClockHigh;
sys/dev/drm/amd/include/pptable.h
678
UCHAR numEntries;
sys/dev/drm/amd/include/pptable.h
684
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
700
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
706
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
717
UCHAR ucRevId;
sys/dev/drm/amd/include/pptable.h
718
UCHAR ucPpmDesign; //A+I or A+A
sys/dev/drm/amd/include/pptable.h
741
UCHAR ucDispConfig;
sys/dev/drm/amd/include/pptable.h
746
UCHAR revid;
sys/dev/drm/amd/include/pptable.h
747
UCHAR numEntries;
sys/dev/drm/amd/include/pptable.h
80
UCHAR ucNonClockStateIndex;
sys/dev/drm/amd/include/pptable.h
81
UCHAR ucClockStateIndices[1]; // variable-sized
sys/dev/drm/amd/include/pptable.h
87
UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same.
sys/dev/drm/amd/include/pptable.h
88
UCHAR ucTHyst; // Temperature hysteresis. Integer.
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
103
UCHAR ucTableRevision;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
146
UCHAR ucEngineClockIndexHigh;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
147
UCHAR ucEngineClockIndexLow;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
149
UCHAR ucMemoryClockIndexHigh;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
150
UCHAR ucMemoryClockIndexLow;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
152
UCHAR ucPCIEGenLow;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
153
UCHAR ucPCIEGenHigh;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
155
UCHAR ucPCIELaneLow;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
156
UCHAR ucPCIELaneHigh;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
161
UCHAR ucUnused[4];
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
165
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
166
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
171
UCHAR ucVddcInd; /* Vddc voltage */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
180
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
181
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
186
UCHAR ucVddInd; /* Base voltage */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
190
UCHAR ucReliabilityTemperature;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
191
UCHAR ucCKSVOffsetandDisable; /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
195
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
196
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
201
UCHAR ucVddInd; /* Base voltage */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
205
UCHAR ucReliabilityTemperature;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
206
UCHAR ucCKSVOffsetandDisable; /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
211
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
212
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
217
UCHAR ucPCIEGenSpeed;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
218
UCHAR usPCIELaneWidth;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
219
UCHAR ucReserved[2];
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
223
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
224
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
229
UCHAR ucPCIEGenSpeed;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
230
UCHAR usPCIELaneWidth;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
231
UCHAR ucReserved[2];
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
236
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
237
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
243
UCHAR ucVddcInd; /* VDDC voltage */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
253
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
254
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
266
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
267
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
272
UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
273
UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
281
UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
286
UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
287
UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
292
UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
293
UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
301
UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
306
UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
307
UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
319
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
320
UCHAR ucType; /* one of ATOM_TONGA_PP_THERMALCONTROLLER_* */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
321
UCHAR ucI2cLine; /* as interpreted by DAL I2C */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
322
UCHAR ucI2cAddress;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
323
UCHAR ucFanParameters; /* Fan Control Parameters. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
324
UCHAR ucFanMinRPM; /* Fan Minimum RPM (hundreds) -- for display purposes only. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
325
UCHAR ucFanMaxRPM; /* Fan Maximum RPM (hundreds) -- for display purposes only. */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
326
UCHAR ucReserved;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
327
UCHAR ucFlags; /* to be defined */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
331
UCHAR ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Tonga_MM_Dependency_Table' type */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
332
UCHAR ucFlag; /* 2 bits indicates memory p-states */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
333
UCHAR ucSCLKIndex; /*index into ATOM_Tonga_SCLK_Dependency_Table */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
334
UCHAR ucMCLKIndex; /*index into ATOM_Tonga_MCLK_Dependency_Table */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
338
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
339
UCHAR ucNumEntries;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
344
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
362
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
382
UCHAR ucLiquid1_I2C_address; /*Liquid */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
383
UCHAR ucLiquid2_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
384
UCHAR ucLiquid_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
385
UCHAR ucVr_I2C_address; /*VR */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
386
UCHAR ucVr_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
387
UCHAR ucPlx_I2C_address; /*PLX */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
388
UCHAR ucPlx_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
395
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
396
UCHAR ucPpmDesign; /*A+I or A+A */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
417
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
418
UCHAR ucNumEntries;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
423
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
424
UCHAR ucVRHotTriggeredSclkDpmIndex; /* If VRHot signal is triggered SCLK will be limited to this DPM level */
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
425
UCHAR ucReserve[5];
sys/dev/drm/amd/powerplay/hwmgr/pptable_v1_0.h
429
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
1279
UCHAR rev_id = *(UCHAR *)(((unsigned long)powerplay_table) + table_offset);
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
194
table_size = sizeof(UCHAR) +
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
772
return (sizeof(UCHAR) + sizeof(UCHAR) +
sys/dev/drm/amd/powerplay/hwmgr/processpptables.c
773
(num_dpm_levels * sizeof(UCHAR)));
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
118
UCHAR ucSocClockIndexHigh;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
119
UCHAR ucSocClockIndexLow;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
120
UCHAR ucGfxClockIndexHigh;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
121
UCHAR ucGfxClockIndexLow;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
122
UCHAR ucMemClockIndexHigh;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
123
UCHAR ucMemClockIndexLow;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
130
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
131
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
137
UCHAR ucVddInd; /* Base voltage */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
142
UCHAR ucVddInd; /* SOC_VDD index */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
149
UCHAR ucVddInd;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
152
UCHAR ucACGEnable;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
153
UCHAR ucReserved[3];
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
158
UCHAR ucVddInd; /* SOC_VDD index */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
159
UCHAR ucVddMemInd; /* MEM_VDD - only non zero for MCLK record */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
160
UCHAR ucVddciInd; /* VDDCI = only non zero for MCLK record */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
164
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
165
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
170
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
171
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
176
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
177
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
182
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
183
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
188
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
189
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
194
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
195
UCHAR ucNumEntries; /* Number of entries.*/
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
200
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
201
UCHAR ucNumEntries; /* Number of entries. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
206
UCHAR ucVddcInd; /* SOC_VDD voltage */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
214
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
215
UCHAR ucNumEntries; /* Number of entries */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
221
UCHAR ucPCIEGenSpeed; /* PCIE Speed */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
222
UCHAR ucPCIELaneWidth; /* PCIE Lane Width */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
226
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
227
UCHAR ucNumEntries; /* Number of entries */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
236
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
237
UCHAR ucNumEntries; /* Number of entries */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
242
UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
257
UCHAR ucEnableZeroRPM;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
263
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
277
UCHAR ucEnableZeroRPM;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
280
UCHAR ucFanParameters;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
281
UCHAR ucFanMinRPM;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
282
UCHAR ucFanMaxRPM;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
286
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
287
UCHAR ucType; /* one of ATOM_VEGA10_PP_THERMALCONTROLLER_*/
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
288
UCHAR ucI2cLine; /* as interpreted by DAL I2C */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
289
UCHAR ucI2cAddress;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
290
UCHAR ucFanParameters; /* Fan Control Parameters. */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
291
UCHAR ucFanMinRPM; /* Fan Minimum RPM (hundreds) -- for display purposes only.*/
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
292
UCHAR ucFanMaxRPM; /* Fan Maximum RPM (hundreds) -- for display purposes only.*/
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
293
UCHAR ucFlags; /* to be defined */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
298
UCHAR ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Vega10_MM_Dependency_Table' type */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
299
UCHAR ucFlag; /* 2 bits indicates memory p-states */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
300
UCHAR ucSCLKIndex; /* index into ATOM_Vega10_SCLK_Dependency_Table */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
301
UCHAR ucMCLKIndex; /* index into ATOM_Vega10_MCLK_Dependency_Table */
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
306
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
307
UCHAR ucNumEntries;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
312
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
327
UCHAR ucLiquid1_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
328
UCHAR ucLiquid2_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
329
UCHAR ucVr_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
330
UCHAR ucPlx_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
331
UCHAR ucLiquid_I2C_LineSCL;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
332
UCHAR ucLiquid_I2C_LineSDA;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
333
UCHAR ucVr_I2C_LineSCL;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
334
UCHAR ucVr_I2C_LineSDA;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
335
UCHAR ucPlx_I2C_LineSCL;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
336
UCHAR ucPlx_I2C_LineSDA;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
342
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
357
UCHAR ucLiquid1_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
358
UCHAR ucLiquid2_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
359
UCHAR ucLiquid_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
360
UCHAR ucVr_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
361
UCHAR ucVr_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
362
UCHAR ucPlx_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
363
UCHAR ucPlx_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
369
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
384
UCHAR ucLiquid1_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
385
UCHAR ucLiquid2_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
386
UCHAR ucLiquid_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
387
UCHAR ucVr_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
388
UCHAR ucVr_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
389
UCHAR ucPlx_I2C_address;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
390
UCHAR ucPlx_I2C_Line;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
409
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
410
UCHAR ucNumEntries;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
416
UCHAR ucRevId;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
75
UCHAR ucTableRevision;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
89
UCHAR ucGfxVoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
90
UCHAR ucSocVoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
91
UCHAR ucUclkVoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
92
UCHAR ucUvdVoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
93
UCHAR ucVceVoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
94
UCHAR ucMp0VoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega10_pptable.h
95
UCHAR ucDcefVoltageMode;
sys/dev/drm/amd/powerplay/hwmgr/vega12_pptable.h
78
UCHAR ucTableRevision;
sys/dev/drm/amd/powerplay/hwmgr/vega12_pptable.h
86
UCHAR ucThermalControllerType;
sys/dev/drm/amd/powerplay/hwmgr/vega20_pptable.h
104
UCHAR ucTableRevision;
sys/dev/drm/amd/powerplay/hwmgr/vega20_pptable.h
113
UCHAR ucTableRevision;
sys/dev/drm/amd/powerplay/hwmgr/vega20_pptable.h
121
UCHAR ucThermalControllerType;
sys/dev/drm/amd/powerplay/hwmgr/vega20_pptable.h
78
UCHAR ucODTableRevision;
sys/dev/drm/amd/powerplay/hwmgr/vega20_pptable.h
80
UCHAR ODFeatureCapabilities [ATOM_VEGA20_ODFEATURE_MAX_COUNT]; //OD feature support flags
sys/dev/drm/radeon/atombios.h
1025
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/radeon/atombios.h
1028
UCHAR ucReserved:1;
sys/dev/drm/radeon/atombios.h
1029
UCHAR fDPConnector:1; //bit4=0: DP connector =1: None DP connector
sys/dev/drm/radeon/atombios.h
1030
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 )
sys/dev/drm/radeon/atombios.h
1031
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/radeon/atombios.h
1034
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/radeon/atombios.h
1035
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/radeon/atombios.h
1037
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/radeon/atombios.h
1038
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/radeon/atombios.h
1039
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/radeon/atombios.h
1041
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA( DIG inst0 ). =1: Data/clk path source from DIGB ( DIG inst1 )
sys/dev/drm/radeon/atombios.h
1042
UCHAR fDPConnector:1; //bit4=0: DP connector =1: None DP connector
sys/dev/drm/radeon/atombios.h
1043
UCHAR ucReserved:1;
sys/dev/drm/radeon/atombios.h
1044
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/radeon/atombios.h
1085
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX
sys/dev/drm/radeon/atombios.h
1086
UCHAR ucReserved[4];
sys/dev/drm/radeon/atombios.h
1092
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/radeon/atombios.h
1095
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2
sys/dev/drm/radeon/atombios.h
1096
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/radeon/atombios.h
1097
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/radeon/atombios.h
1099
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/radeon/atombios.h
1100
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/radeon/atombios.h
1102
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/radeon/atombios.h
1103
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/radeon/atombios.h
1104
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/radeon/atombios.h
1106
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/radeon/atombios.h
1107
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, EXT_CLK=2
sys/dev/drm/radeon/atombios.h
1108
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/radeon/atombios.h
1124
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX
sys/dev/drm/radeon/atombios.h
1125
UCHAR ucLaneNum;
sys/dev/drm/radeon/atombios.h
1126
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
1167
UCHAR ucLaneSel;
sys/dev/drm/radeon/atombios.h
1170
UCHAR ucLaneSet;
sys/dev/drm/radeon/atombios.h
1173
UCHAR ucPOST_CURSOR2:2; //Bit[7:6] Post Cursor2 Level <= New in V4
sys/dev/drm/radeon/atombios.h
1174
UCHAR ucPRE_EMPHASIS:3; //Bit[5:3] Pre-emphasis Level
sys/dev/drm/radeon/atombios.h
1175
UCHAR ucVOLTAGE_SWING:3; //Bit[2:0] Voltage Swing Level
sys/dev/drm/radeon/atombios.h
1177
UCHAR ucVOLTAGE_SWING:3; //Bit[2:0] Voltage Swing Level
sys/dev/drm/radeon/atombios.h
1178
UCHAR ucPRE_EMPHASIS:3; //Bit[5:3] Pre-emphasis Level
sys/dev/drm/radeon/atombios.h
1179
UCHAR ucPOST_CURSOR2:2; //Bit[7:6] Post Cursor2 Level <= New in V4
sys/dev/drm/radeon/atombios.h
1188
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/radeon/atombios.h
1191
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New
sys/dev/drm/radeon/atombios.h
1192
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/radeon/atombios.h
1193
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/radeon/atombios.h
1195
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/radeon/atombios.h
1196
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/radeon/atombios.h
1198
UCHAR fDualLinkConnector:1; //bit0=1: Dual Link DVI connector
sys/dev/drm/radeon/atombios.h
1199
UCHAR fCoherentMode:1; //bit1=1: Coherent Mode ( for DVI/HDMI mode )
sys/dev/drm/radeon/atombios.h
1200
UCHAR ucLinkSel:1; //bit2=0: Uniphy LINKA or C or E when fDualLinkConnector=0. when fDualLinkConnector=1, it means master link of dual link is A or C or E
sys/dev/drm/radeon/atombios.h
1202
UCHAR ucEncoderSel:1; //bit3=0: Data/Clk path source from DIGA/C/E. =1: Data/clk path source from DIGB/D/F
sys/dev/drm/radeon/atombios.h
1203
UCHAR ucRefClkSource:2; //bit5:4: PPLL1 =0, PPLL2=1, DCPLL=2, EXT_CLK=3 <= New
sys/dev/drm/radeon/atombios.h
1204
UCHAR ucTransmitterSel:2; //bit7:6: =0 Dig Transmitter 1 ( Uniphy AB )
sys/dev/drm/radeon/atombios.h
1221
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
1223
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_XXX
sys/dev/drm/radeon/atombios.h
1224
UCHAR ucLaneNum;
sys/dev/drm/radeon/atombios.h
1225
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
1257
UCHAR ucReservd1:1;
sys/dev/drm/radeon/atombios.h
1258
UCHAR ucHPDSel:3;
sys/dev/drm/radeon/atombios.h
1259
UCHAR ucPhyClkSrcId:2;
sys/dev/drm/radeon/atombios.h
1260
UCHAR ucCoherentMode:1;
sys/dev/drm/radeon/atombios.h
1261
UCHAR ucReserved:1;
sys/dev/drm/radeon/atombios.h
1263
UCHAR ucReserved:1;
sys/dev/drm/radeon/atombios.h
1264
UCHAR ucCoherentMode:1;
sys/dev/drm/radeon/atombios.h
1265
UCHAR ucPhyClkSrcId:2;
sys/dev/drm/radeon/atombios.h
1266
UCHAR ucHPDSel:3;
sys/dev/drm/radeon/atombios.h
1267
UCHAR ucReservd1:1;
sys/dev/drm/radeon/atombios.h
1274
UCHAR ucPhyId; // 0=UNIPHYA, 1=UNIPHYB, 2=UNIPHYC, 3=UNIPHYD, 4= UNIPHYE 5=UNIPHYF
sys/dev/drm/radeon/atombios.h
1275
UCHAR ucAction; // define as ATOM_TRANSMITER_ACTION_xxx
sys/dev/drm/radeon/atombios.h
1276
UCHAR ucLaneNum; // indicate lane number 1-8
sys/dev/drm/radeon/atombios.h
1277
UCHAR ucConnObjId; // Connector Object Id defined in ObjectId.h
sys/dev/drm/radeon/atombios.h
1278
UCHAR ucDigMode; // indicate DIG mode
sys/dev/drm/radeon/atombios.h
1281
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
1283
UCHAR ucDigEncoderSel; // indicate DIG front end encoder
sys/dev/drm/radeon/atombios.h
1284
UCHAR ucDPLaneSet;
sys/dev/drm/radeon/atombios.h
1285
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
1286
UCHAR ucReserved1;
sys/dev/drm/radeon/atombios.h
1367
UCHAR ucConfig; // indicate which encoder, and DP link rate when ucAction = SETUP/ENABLE_OUTPUT
sys/dev/drm/radeon/atombios.h
1368
UCHAR ucAction; //
sys/dev/drm/radeon/atombios.h
1369
UCHAR ucEncoderMode; // encoder mode, only used when ucAction = SETUP/ENABLE_OUTPUT
sys/dev/drm/radeon/atombios.h
1370
UCHAR ucLaneNum; // lane number, only used when ucAction = SETUP/ENABLE_OUTPUT
sys/dev/drm/radeon/atombios.h
1371
UCHAR ucBitPerColor; // output bit per color, only valid when ucAction = SETUP/ENABLE_OUTPUT and ucEncodeMode= DP
sys/dev/drm/radeon/atombios.h
1372
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
1410
UCHAR ucAction; // Possible input:ATOM_ENABLE||ATOMDISABLE
sys/dev/drm/radeon/atombios.h
1415
UCHAR aucPadding[3]; // padding to DWORD aligned
sys/dev/drm/radeon/atombios.h
1451
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
1452
UCHAR ucBlanking; // ATOM_BLANKING or ATOM_BLANKINGOFF
sys/dev/drm/radeon/atombios.h
1466
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
1467
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
1468
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
1481
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
1482
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
1491
UCHAR ucH_Replication; // horizontal replication
sys/dev/drm/radeon/atombios.h
1492
UCHAR ucV_Replication; // vertical replication
sys/dev/drm/radeon/atombios.h
1493
UCHAR usCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
1494
UCHAR ucPadding;
sys/dev/drm/radeon/atombios.h
1503
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
1504
UCHAR ucDevice; // ATOM_DEVICE_CRT1|ATOM_DEVICE_CRT2|....
sys/dev/drm/radeon/atombios.h
1505
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
1511
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
1512
UCHAR ucEncoderID; // DAC1/DAC2/TVOUT/DIG1/DIG2/DVO
sys/dev/drm/radeon/atombios.h
1513
UCHAR ucEncodeMode; // Encoding mode, only valid when using DIG1/DIG2/DVO
sys/dev/drm/radeon/atombios.h
1514
UCHAR ucPadding;
sys/dev/drm/radeon/atombios.h
1548
UCHAR ucPostDiv; // post divider
sys/dev/drm/radeon/atombios.h
1549
UCHAR ucFracFbDiv; // fractional feedback divider
sys/dev/drm/radeon/atombios.h
1550
UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2
sys/dev/drm/radeon/atombios.h
1551
UCHAR ucRefDivSrc; // ATOM_PJITTER or ATO_NONPJITTER
sys/dev/drm/radeon/atombios.h
1552
UCHAR ucCRTC; // Which CRTC uses this Ppll
sys/dev/drm/radeon/atombios.h
1553
UCHAR ucPadding;
sys/dev/drm/radeon/atombios.h
1568
UCHAR ucPostDiv; // post divider
sys/dev/drm/radeon/atombios.h
1569
UCHAR ucFracFbDiv; // fractional feedback divider
sys/dev/drm/radeon/atombios.h
1570
UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2
sys/dev/drm/radeon/atombios.h
1571
UCHAR ucRefDivSrc; // ATOM_PJITTER or ATO_NONPJITTER
sys/dev/drm/radeon/atombios.h
1572
UCHAR ucCRTC; // Which CRTC uses this Ppll
sys/dev/drm/radeon/atombios.h
1573
UCHAR ucMiscInfo; // Different bits for different purpose, bit [7:4] as device index, bit[0]=Force prog
sys/dev/drm/radeon/atombios.h
1615
UCHAR ucPostDiv; // post divider
sys/dev/drm/radeon/atombios.h
1616
UCHAR ucFracFbDiv; // fractional feedback divider
sys/dev/drm/radeon/atombios.h
1617
UCHAR ucPpll; // ATOM_PPLL1 or ATOM_PPL2
sys/dev/drm/radeon/atombios.h
1618
UCHAR ucTransmitterId; // graphic encoder id defined in objectId.h
sys/dev/drm/radeon/atombios.h
1621
UCHAR ucEncoderMode; // encoder type defined as ATOM_ENCODER_MODE_DP/DVI/HDMI/
sys/dev/drm/radeon/atombios.h
1622
UCHAR ucDVOConfig; // when use DVO, need to know SDR/DDR, 12bit or 24bit
sys/dev/drm/radeon/atombios.h
1624
UCHAR ucMiscInfo; // bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC sel
sys/dev/drm/radeon/atombios.h
1634
UCHAR ucCRTC; // ATOM_CRTC1~6, indicate the CRTC controller to
sys/dev/drm/radeon/atombios.h
1637
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
1638
UCHAR ucFracFbDiv; // [gphan] temporary to prevent build problem. remove it after driver code is changed.
sys/dev/drm/radeon/atombios.h
1643
UCHAR ucPostDiv; // post divider.
sys/dev/drm/radeon/atombios.h
1644
UCHAR ucRefDiv; // Reference divider
sys/dev/drm/radeon/atombios.h
1645
UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2/ATOM_DCPLL
sys/dev/drm/radeon/atombios.h
1646
UCHAR ucTransmitterID; // ASIC encoder id defined in objectId.h,
sys/dev/drm/radeon/atombios.h
1648
UCHAR ucEncoderMode; // Encoder mode:
sys/dev/drm/radeon/atombios.h
1649
UCHAR ucMiscInfo; // bit[0]= Force program PPLL
sys/dev/drm/radeon/atombios.h
1691
UCHAR ucPostDiv; // post divider.
sys/dev/drm/radeon/atombios.h
1692
UCHAR ucRefDiv; // Reference divider
sys/dev/drm/radeon/atombios.h
1693
UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2/ATOM_DCPLL
sys/dev/drm/radeon/atombios.h
1694
UCHAR ucTransmitterID; // ASIC encoder id defined in objectId.h,
sys/dev/drm/radeon/atombios.h
1696
UCHAR ucEncoderMode; // Encoder mode:
sys/dev/drm/radeon/atombios.h
1697
UCHAR ucMiscInfo; // bit[0]= Force program PPLL
sys/dev/drm/radeon/atombios.h
1728
UCHAR ucStatus;
sys/dev/drm/radeon/atombios.h
1729
UCHAR ucRefDivSrc; // =1: reference clock source from XTALIN, =0: source from PCIE ref clock
sys/dev/drm/radeon/atombios.h
1730
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
1744
UCHAR ucTransmitterID;
sys/dev/drm/radeon/atombios.h
1745
UCHAR ucEncodeMode;
sys/dev/drm/radeon/atombios.h
1748
UCHAR ucDVOConfig; //if DVO, need passing link rate and output 12bitlow or 24bit
sys/dev/drm/radeon/atombios.h
1749
UCHAR ucConfig; //if none DVO, not defined yet
sys/dev/drm/radeon/atombios.h
1751
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
1760
UCHAR ucTransmitterID; // GPU transmitter id defined in objectid.h
sys/dev/drm/radeon/atombios.h
1761
UCHAR ucEncodeMode; // encoder mode: CRT, LVDS, DP, TMDS or HDMI
sys/dev/drm/radeon/atombios.h
1762
UCHAR ucDispPllConfig; // display pll configure parameter defined as following DISPPLL_CONFIG_XXXX
sys/dev/drm/radeon/atombios.h
1763
UCHAR ucExtTransmitterID; // external encoder id.
sys/dev/drm/radeon/atombios.h
1764
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
1783
UCHAR ucRefDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider and post_div ( if it is not given )
sys/dev/drm/radeon/atombios.h
1784
UCHAR ucPostDiv; // if it is none-zero, it is used to be calculated the other ppll parameter fb_divider
sys/dev/drm/radeon/atombios.h
1785
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
1802
UCHAR ucEnable; // ATOM_ENABLE:Enable YUV or ATOM_DISABLE:Disable YUV (RGB)
sys/dev/drm/radeon/atombios.h
1803
UCHAR ucCRTC; // Which CRTC needs this YUV or RGB format
sys/dev/drm/radeon/atombios.h
1804
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
1837
UCHAR ucSlaveAddr; //Read from which slave
sys/dev/drm/radeon/atombios.h
1838
UCHAR ucLineNumber; //Read from which HW assisted line
sys/dev/drm/radeon/atombios.h
1859
UCHAR ucData; //PS data1
sys/dev/drm/radeon/atombios.h
1860
UCHAR ucStatus; //Status byte 1=success, 2=failure, Also is used as PS data2
sys/dev/drm/radeon/atombios.h
1861
UCHAR ucSlaveAddr; //Write to which slave
sys/dev/drm/radeon/atombios.h
1862
UCHAR ucLineNumber; //Write from which HW assisted line
sys/dev/drm/radeon/atombios.h
1870
UCHAR ucSlaveAddr; //Write to which slave
sys/dev/drm/radeon/atombios.h
1871
UCHAR ucLineNumber; //Write from which HW assisted line
sys/dev/drm/radeon/atombios.h
1884
UCHAR ucPowerConnectorStatus; //Used for return value 0: detected, 1:not detected
sys/dev/drm/radeon/atombios.h
1885
UCHAR ucPwrBehaviorId;
sys/dev/drm/radeon/atombios.h
1891
UCHAR ucPowerConnectorStatus; //Used for return value 0: detected, 1:not detected
sys/dev/drm/radeon/atombios.h
1892
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
1905
UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD
sys/dev/drm/radeon/atombios.h
1906
UCHAR ucSpreadSpectrumStepSize_Delay; //bits3:2 SS_STEP_SIZE; bit 6:4 SS_DELAY
sys/dev/drm/radeon/atombios.h
1907
UCHAR ucEnable; //ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
1908
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
1915
UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD
sys/dev/drm/radeon/atombios.h
1916
UCHAR ucSpreadSpectrumStep; //
sys/dev/drm/radeon/atombios.h
1917
UCHAR ucEnable; //ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
1918
UCHAR ucSpreadSpectrumDelay;
sys/dev/drm/radeon/atombios.h
1919
UCHAR ucSpreadSpectrumRange;
sys/dev/drm/radeon/atombios.h
1920
UCHAR ucPadding;
sys/dev/drm/radeon/atombios.h
1927
UCHAR ucSpreadSpectrumType; // Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Others:TBD
sys/dev/drm/radeon/atombios.h
1928
UCHAR ucSpreadSpectrumStep; //
sys/dev/drm/radeon/atombios.h
1929
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
1930
UCHAR ucSpreadSpectrumDelay;
sys/dev/drm/radeon/atombios.h
1931
UCHAR ucSpreadSpectrumRange;
sys/dev/drm/radeon/atombios.h
1932
UCHAR ucPpll; // ATOM_PPLL1/ATOM_PPLL2
sys/dev/drm/radeon/atombios.h
1938
UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread.
sys/dev/drm/radeon/atombios.h
1942
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
1963
UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread.
sys/dev/drm/radeon/atombios.h
1967
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
2018
UCHAR ucMisc; // bit0=0: Enable single link
sys/dev/drm/radeon/atombios.h
2022
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/radeon/atombios.h
203
UCHAR ucTableFormatRevision; /*Change it when the Parser is not backward compatible */
sys/dev/drm/radeon/atombios.h
2039
UCHAR ucMisc; // see PANEL_ENCODER_MISC_xx defintions below
sys/dev/drm/radeon/atombios.h
204
UCHAR ucTableContentRevision; /*Change it only when the table needs to change but the firmware */
sys/dev/drm/radeon/atombios.h
2040
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/radeon/atombios.h
2042
UCHAR ucTruncate; // bit0=0: Disable truncate
sys/dev/drm/radeon/atombios.h
2046
UCHAR ucSpatial; // bit0=0: Disable spatial dithering
sys/dev/drm/radeon/atombios.h
2050
UCHAR ucTemporal; // bit0=0: Disable temporal dithering
sys/dev/drm/radeon/atombios.h
2056
UCHAR ucFRC; // bit4=0: 25FRC_SEL pattern E
sys/dev/drm/radeon/atombios.h
2088
UCHAR ucEnable; // Enable or Disable External TMDS encoder
sys/dev/drm/radeon/atombios.h
2089
UCHAR ucMisc; // Bit0=0:Enable Single link;=1:Enable Dual link;Bit1 {=0:666RGB, =1:888RGB}
sys/dev/drm/radeon/atombios.h
2090
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
2130
UCHAR ucDVOConfig;
sys/dev/drm/radeon/atombios.h
2131
UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT
sys/dev/drm/radeon/atombios.h
2132
UCHAR ucReseved[4];
sys/dev/drm/radeon/atombios.h
2139
UCHAR ucDVOConfig;
sys/dev/drm/radeon/atombios.h
214
UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
sys/dev/drm/radeon/atombios.h
2140
UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT
sys/dev/drm/radeon/atombios.h
2141
UCHAR ucBitPerColor; //please refer to definition of PANEL_xBIT_PER_COLOR
sys/dev/drm/radeon/atombios.h
2142
UCHAR ucReseved[3];
sys/dev/drm/radeon/atombios.h
2215
UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ
sys/dev/drm/radeon/atombios.h
2216
UCHAR ucVoltageMode; // To set all, to set source A or source B or ...
sys/dev/drm/radeon/atombios.h
2217
UCHAR ucVoltageIndex; // An index to tell which voltage level
sys/dev/drm/radeon/atombios.h
2218
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
2223
UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ
sys/dev/drm/radeon/atombios.h
2224
UCHAR ucVoltageMode; // Not used, maybe use for state machine for differen power mode
sys/dev/drm/radeon/atombios.h
2231
UCHAR ucVoltageType; // To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/radeon/atombios.h
2232
UCHAR ucVoltageMode; // Indicate action: Set voltage level
sys/dev/drm/radeon/atombios.h
2269
UCHAR ucVoltageType; // Input: To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/radeon/atombios.h
2270
UCHAR ucVoltageMode; // Input: Indicate action: Get voltage info
sys/dev/drm/radeon/atombios.h
229
UCHAR ucExtendedFunctionCode;
sys/dev/drm/radeon/atombios.h
230
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
2308
UCHAR ucVoltageType; // Input: To tell which voltage to set up, VDDC/MVDDC/MVDDQ/VDDCI
sys/dev/drm/radeon/atombios.h
2309
UCHAR ucVoltageMode; // Input: Indicate action: Get voltage info
sys/dev/drm/radeon/atombios.h
2331
UCHAR ucTvStandard; // See definition "ATOM_TV_NTSC ..."
sys/dev/drm/radeon/atombios.h
2332
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/radeon/atombios.h
2403
UCHAR ucI2C_Type; // I2C type (normal GP_IO, ImpactTV GP_IO, Dedicated I2C pin, etc)
sys/dev/drm/radeon/atombios.h
2404
UCHAR ucTV_OutInfo; // Type of TV out supported (3:0) and video out crystal frequency (6:4) and TV data port (7)
sys/dev/drm/radeon/atombios.h
2405
UCHAR ucVideoPortInfo; // Provides the video port capabilities
sys/dev/drm/radeon/atombios.h
2406
UCHAR ucHostPortInfo; // Provides host port configuration information
sys/dev/drm/radeon/atombios.h
2416
UCHAR ucTunerInfo; // Type of tuner installed on the adapter (4:0) and video input for tuner (7:5)
sys/dev/drm/radeon/atombios.h
2417
UCHAR ucAudioChipInfo; // List the audio chip type (3:0) product type (4) and OEM revision (7:5)
sys/dev/drm/radeon/atombios.h
2418
UCHAR ucProductID; // Defines as OEM ID or ATI board ID dependent on product type setting
sys/dev/drm/radeon/atombios.h
2419
UCHAR ucMiscInfo1; // Tuner voltage (1:0) HW teletext support (3:2) FM audio decoder (5:4) reserved (6) audio scrambling (7)
sys/dev/drm/radeon/atombios.h
2420
UCHAR ucMiscInfo2; // I2S input config (0) I2S output config (1) I2S Audio Chip (4:2) SPDIF Output Config (5) reserved (7:6)
sys/dev/drm/radeon/atombios.h
2421
UCHAR ucMiscInfo3; // Video Decoder Type (3:0) Video In Standard/Crystal (7:4)
sys/dev/drm/radeon/atombios.h
2422
UCHAR ucMiscInfo4; // Video Decoder Host Config (2:0) reserved (7:3)
sys/dev/drm/radeon/atombios.h
2423
UCHAR ucVideoInput0Info;// Video Input 0 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/radeon/atombios.h
2424
UCHAR ucVideoInput1Info;// Video Input 1 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/radeon/atombios.h
2425
UCHAR ucVideoInput2Info;// Video Input 2 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/radeon/atombios.h
2426
UCHAR ucVideoInput3Info;// Video Input 3 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/radeon/atombios.h
2427
UCHAR ucVideoInput4Info;// Video Input 4 Type (1:0) F/B setting (2) physical connector ID (5:3) reserved (7:6)
sys/dev/drm/radeon/atombios.h
2519
UCHAR ucASICMaxTemperature;
sys/dev/drm/radeon/atombios.h
2520
UCHAR ucPadding[3]; //Don't use them
sys/dev/drm/radeon/atombios.h
2535
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/radeon/atombios.h
2536
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2537
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2553
UCHAR ucASICMaxTemperature;
sys/dev/drm/radeon/atombios.h
2554
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
2555
UCHAR ucPadding[2]; //Don't use them
sys/dev/drm/radeon/atombios.h
2571
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/radeon/atombios.h
2572
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2573
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2589
UCHAR ucASICMaxTemperature;
sys/dev/drm/radeon/atombios.h
2590
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
2591
UCHAR ucPadding[2]; //Don't use them
sys/dev/drm/radeon/atombios.h
2608
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/radeon/atombios.h
2609
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2610
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2626
UCHAR ucASICMaxTemperature;
sys/dev/drm/radeon/atombios.h
2627
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
2646
UCHAR ucPM_RTS_StreamSize; //RTS PM4 packets in Kb unit
sys/dev/drm/radeon/atombios.h
2647
UCHAR ucDesign_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2648
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2665
UCHAR ucReserved1; //Was ucASICMaxTemperature;
sys/dev/drm/radeon/atombios.h
2666
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
2686
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2687
UCHAR ucReserved4[3];
sys/dev/drm/radeon/atombios.h
2706
UCHAR ucReserved3; //Was ucASICMaxTemperature;
sys/dev/drm/radeon/atombios.h
2707
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
2713
UCHAR ucRemoteDisplayConfig;
sys/dev/drm/radeon/atombios.h
2714
UCHAR ucReserved5[3]; //Was usMinEngineClockPLL_Input and usMaxEngineClockPLL_Input
sys/dev/drm/radeon/atombios.h
2725
UCHAR ucMemoryModule_ID; //Indicate what is the board design
sys/dev/drm/radeon/atombios.h
2726
UCHAR ucReserved9[3];
sys/dev/drm/radeon/atombios.h
2754
UCHAR ucNumberOfCyclesInPeriodHi;
sys/dev/drm/radeon/atombios.h
2755
UCHAR ucLCDTimingSel; //=0:not valid.!=0 sel this timing descriptor from LCD EDID.
sys/dev/drm/radeon/atombios.h
2769
UCHAR ucMaxNBVoltage;
sys/dev/drm/radeon/atombios.h
2770
UCHAR ucMinNBVoltage;
sys/dev/drm/radeon/atombios.h
2771
UCHAR ucMemoryType; //[7:4]=1:DDR1;=2:DDR2;=3:DDR3.[3:0] is reserved
sys/dev/drm/radeon/atombios.h
2772
UCHAR ucNumberOfCyclesInPeriod; //CG.FVTHROT_PWM_CTRL_REG0.NumberOfCyclesInPeriod
sys/dev/drm/radeon/atombios.h
2773
UCHAR ucStartingPWM_HighTime; //CG.FVTHROT_PWM_CTRL_REG0.StartingPWM_HighTime
sys/dev/drm/radeon/atombios.h
2774
UCHAR ucHTLinkWidth; //16 bit vs. 8 bit
sys/dev/drm/radeon/atombios.h
2775
UCHAR ucMaxNBVoltageHigh;
sys/dev/drm/radeon/atombios.h
2776
UCHAR ucMinNBVoltageHigh;
sys/dev/drm/radeon/atombios.h
2833
UCHAR ucMemoryType; //[3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved
sys/dev/drm/radeon/atombios.h
2834
UCHAR ucUMAChannelNumber;
sys/dev/drm/radeon/atombios.h
2835
UCHAR ucDockingPinBit;
sys/dev/drm/radeon/atombios.h
2836
UCHAR ucDockingPinPolarity;
sys/dev/drm/radeon/atombios.h
3008
UCHAR ucHtcTmpLmt; //bit [22:16] of D24F3x64 Hardware Thermal Control (HTC) Register, may not be needed, TBD
sys/dev/drm/radeon/atombios.h
3009
UCHAR ucTjOffset; //bit [28:22] of D24F3xE4 Thermtrip Status Register,may not be needed, TBD
sys/dev/drm/radeon/atombios.h
3016
UCHAR ucMemoryType; //[3:0]=1:DDR1;=2:DDR2;=3:DDR3.[7:4] is reserved
sys/dev/drm/radeon/atombios.h
3017
UCHAR ucUMAChannelNumber;
sys/dev/drm/radeon/atombios.h
3184
UCHAR bfHW_Capable:1;
sys/dev/drm/radeon/atombios.h
3185
UCHAR bfHW_EngineID:3;
sys/dev/drm/radeon/atombios.h
3186
UCHAR bfI2C_LineMux:4;
sys/dev/drm/radeon/atombios.h
3188
UCHAR bfI2C_LineMux:4;
sys/dev/drm/radeon/atombios.h
3189
UCHAR bfHW_EngineID:3;
sys/dev/drm/radeon/atombios.h
3190
UCHAR bfHW_Capable:1;
sys/dev/drm/radeon/atombios.h
3197
UCHAR ucAccess;
sys/dev/drm/radeon/atombios.h
3215
UCHAR ucClkMaskShift;
sys/dev/drm/radeon/atombios.h
3216
UCHAR ucClkEnShift;
sys/dev/drm/radeon/atombios.h
3217
UCHAR ucClkY_Shift;
sys/dev/drm/radeon/atombios.h
3218
UCHAR ucClkA_Shift;
sys/dev/drm/radeon/atombios.h
3219
UCHAR ucDataMaskShift;
sys/dev/drm/radeon/atombios.h
3220
UCHAR ucDataEnShift;
sys/dev/drm/radeon/atombios.h
3221
UCHAR ucDataY_Shift;
sys/dev/drm/radeon/atombios.h
3222
UCHAR ucDataA_Shift;
sys/dev/drm/radeon/atombios.h
3223
UCHAR ucReserved1;
sys/dev/drm/radeon/atombios.h
3224
UCHAR ucReserved2;
sys/dev/drm/radeon/atombios.h
3332
UCHAR ucH_Border; // From DFP EDID
sys/dev/drm/radeon/atombios.h
3333
UCHAR ucV_Border;
sys/dev/drm/radeon/atombios.h
3334
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
3335
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
3352
UCHAR ucCRTC; // ATOM_CRTC1 or ATOM_CRTC2
sys/dev/drm/radeon/atombios.h
3353
UCHAR ucOverscanRight; // right
sys/dev/drm/radeon/atombios.h
3354
UCHAR ucOverscanLeft; // left
sys/dev/drm/radeon/atombios.h
3355
UCHAR ucOverscanBottom; // bottom
sys/dev/drm/radeon/atombios.h
3356
UCHAR ucOverscanTop; // top
sys/dev/drm/radeon/atombios.h
3357
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
3383
UCHAR ucInternalModeNumber;
sys/dev/drm/radeon/atombios.h
3384
UCHAR ucRefreshRate;
sys/dev/drm/radeon/atombios.h
3400
UCHAR ucHBorder;
sys/dev/drm/radeon/atombios.h
3401
UCHAR ucVBorder;
sys/dev/drm/radeon/atombios.h
3403
UCHAR ucInternalModeNumber;
sys/dev/drm/radeon/atombios.h
3404
UCHAR ucRefreshRate;
sys/dev/drm/radeon/atombios.h
3425
UCHAR ucPowerSequenceDigOntoDEin10Ms;
sys/dev/drm/radeon/atombios.h
3426
UCHAR ucPowerSequenceDEtoBLOnin10Ms;
sys/dev/drm/radeon/atombios.h
3427
UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level}
sys/dev/drm/radeon/atombios.h
3431
UCHAR ucPanelDefaultRefreshRate;
sys/dev/drm/radeon/atombios.h
3432
UCHAR ucPanelIdentification;
sys/dev/drm/radeon/atombios.h
3433
UCHAR ucSS_Id;
sys/dev/drm/radeon/atombios.h
3445
UCHAR ucPowerSequenceDigOntoDEin10Ms;
sys/dev/drm/radeon/atombios.h
3446
UCHAR ucPowerSequenceDEtoBLOnin10Ms;
sys/dev/drm/radeon/atombios.h
3447
UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level}
sys/dev/drm/radeon/atombios.h
3451
UCHAR ucPanelDefaultRefreshRate;
sys/dev/drm/radeon/atombios.h
3452
UCHAR ucPanelIdentification;
sys/dev/drm/radeon/atombios.h
3453
UCHAR ucSS_Id;
sys/dev/drm/radeon/atombios.h
3456
UCHAR ucLCDPanel_SpecialHandlingCap;
sys/dev/drm/radeon/atombios.h
3457
UCHAR ucPanelInfoSize; // start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable
sys/dev/drm/radeon/atombios.h
3458
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
3508
UCHAR ucLCD_Misc; // Reorganized in V13
sys/dev/drm/radeon/atombios.h
3514
UCHAR ucPanelDefaultRefreshRate;
sys/dev/drm/radeon/atombios.h
3515
UCHAR ucPanelIdentification;
sys/dev/drm/radeon/atombios.h
3516
UCHAR ucSS_Id;
sys/dev/drm/radeon/atombios.h
3519
UCHAR ucLCDPanel_SpecialHandlingCap; // Reorganized in V13
sys/dev/drm/radeon/atombios.h
3524
UCHAR ucPanelInfoSize; // start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable
sys/dev/drm/radeon/atombios.h
3527
UCHAR ucPowerSequenceDIGONtoDE_in4Ms;
sys/dev/drm/radeon/atombios.h
3528
UCHAR ucPowerSequenceDEtoVARY_BL_in4Ms;
sys/dev/drm/radeon/atombios.h
3529
UCHAR ucPowerSequenceVARY_BLtoDE_in4Ms;
sys/dev/drm/radeon/atombios.h
3530
UCHAR ucPowerSequenceDEtoDIGON_in4Ms;
sys/dev/drm/radeon/atombios.h
3532
UCHAR ucOffDelay_in4Ms;
sys/dev/drm/radeon/atombios.h
3533
UCHAR ucPowerSequenceVARY_BLtoBLON_in4Ms;
sys/dev/drm/radeon/atombios.h
3534
UCHAR ucPowerSequenceBLONtoVARY_BL_in4Ms;
sys/dev/drm/radeon/atombios.h
3535
UCHAR ucReserved1;
sys/dev/drm/radeon/atombios.h
3537
UCHAR ucDPCD_eDP_CONFIGURATION_CAP; // dpcd 0dh
sys/dev/drm/radeon/atombios.h
3538
UCHAR ucDPCD_MAX_LINK_RATE; // dpcd 01h
sys/dev/drm/radeon/atombios.h
3539
UCHAR ucDPCD_MAX_LANE_COUNT; // dpcd 02h
sys/dev/drm/radeon/atombios.h
3540
UCHAR ucDPCD_MAX_DOWNSPREAD; // dpcd 03h
sys/dev/drm/radeon/atombios.h
3543
UCHAR uceDPToLVDSRxId;
sys/dev/drm/radeon/atombios.h
3544
UCHAR ucLcdReservd;
sys/dev/drm/radeon/atombios.h
3591
UCHAR ucRecordType;
sys/dev/drm/radeon/atombios.h
3598
UCHAR ucRecordType;
sys/dev/drm/radeon/atombios.h
3599
UCHAR ucRTSValue;
sys/dev/drm/radeon/atombios.h
3606
UCHAR ucRecordType;
sys/dev/drm/radeon/atombios.h
3616
UCHAR ucRecordType;
sys/dev/drm/radeon/atombios.h
3617
UCHAR ucFakeEDIDLength;
sys/dev/drm/radeon/atombios.h
3618
UCHAR ucFakeEDIDString[1]; // This actually has ucFakeEdidLength elements.
sys/dev/drm/radeon/atombios.h
3623
UCHAR ucRecordType;
sys/dev/drm/radeon/atombios.h
3643
UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int. Bit2=1: PCIE REFCLK SS =0 iternal PPLL SS Others:TBD
sys/dev/drm/radeon/atombios.h
3644
UCHAR ucSS_Step;
sys/dev/drm/radeon/atombios.h
3645
UCHAR ucSS_Delay;
sys/dev/drm/radeon/atombios.h
3646
UCHAR ucSS_Id;
sys/dev/drm/radeon/atombios.h
3647
UCHAR ucRecommendedRef_Div;
sys/dev/drm/radeon/atombios.h
3648
UCHAR ucSS_Range; //it was reserved for V11
sys/dev/drm/radeon/atombios.h
3704
UCHAR ucTV_SupportedStandard;
sys/dev/drm/radeon/atombios.h
3705
UCHAR ucTV_BootUpDefaultStandard;
sys/dev/drm/radeon/atombios.h
3706
UCHAR ucExt_TV_ASIC_ID;
sys/dev/drm/radeon/atombios.h
3707
UCHAR ucExt_TV_ASIC_SlaveAddr;
sys/dev/drm/radeon/atombios.h
3717
UCHAR ucTV_SupportedStandard;
sys/dev/drm/radeon/atombios.h
3718
UCHAR ucTV_BootUpDefaultStandard;
sys/dev/drm/radeon/atombios.h
3719
UCHAR ucExt_TV_ASIC_ID;
sys/dev/drm/radeon/atombios.h
3720
UCHAR ucExt_TV_ASIC_SlaveAddr;
sys/dev/drm/radeon/atombios.h
3726
UCHAR ucRevisionNumber; //10h : Revision 1.0; 11h : Revision 1.1
sys/dev/drm/radeon/atombios.h
3727
UCHAR ucMaxLinkRate; //06h : 1.62Gbps per lane; 0Ah = 2.7Gbps per lane
sys/dev/drm/radeon/atombios.h
3728
UCHAR ucMaxLane; //Bits 4:0 = MAX_LANE_COUNT (1/2/4). Bit 7 = ENHANCED_FRAME_CAP
sys/dev/drm/radeon/atombios.h
3729
UCHAR ucMaxDownSpread; //Bit0 = 0: No Down spread; Bit0 = 1: 0.5% (Subject to change according to DP spec)
sys/dev/drm/radeon/atombios.h
3881
UCHAR ucGpioPinBitShift;
sys/dev/drm/radeon/atombios.h
3882
UCHAR ucGPIO_ID;
sys/dev/drm/radeon/atombios.h
3914
UCHAR ucSettings;
sys/dev/drm/radeon/atombios.h
3915
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
3957
UCHAR ucBitShift;
sys/dev/drm/radeon/atombios.h
3958
UCHAR ucPinActiveState; //ucPinActiveState: Bit0=1 active high, =0 active low
sys/dev/drm/radeon/atombios.h
3960
UCHAR ucMiscInfo;
sys/dev/drm/radeon/atombios.h
3961
UCHAR uc480i;
sys/dev/drm/radeon/atombios.h
3962
UCHAR uc480p;
sys/dev/drm/radeon/atombios.h
3963
UCHAR uc720p;
sys/dev/drm/radeon/atombios.h
3964
UCHAR uc1080i;
sys/dev/drm/radeon/atombios.h
3965
UCHAR ucLetterBoxMode;
sys/dev/drm/radeon/atombios.h
3966
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
3967
UCHAR ucNumOfWbGpioBlocks; //For Component video D-Connector support. If zere, NTSC type connector
sys/dev/drm/radeon/atombios.h
3977
UCHAR ucMiscInfo;
sys/dev/drm/radeon/atombios.h
3978
UCHAR uc480i;
sys/dev/drm/radeon/atombios.h
3979
UCHAR uc480p;
sys/dev/drm/radeon/atombios.h
3980
UCHAR uc720p;
sys/dev/drm/radeon/atombios.h
3981
UCHAR uc1080i;
sys/dev/drm/radeon/atombios.h
3982
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
3983
UCHAR ucLetterBoxMode;
sys/dev/drm/radeon/atombios.h
3984
UCHAR ucNumOfWbGpioBlocks; //For Component video D-Connector support. If zere, NTSC type connector
sys/dev/drm/radeon/atombios.h
4037
UCHAR ucNumOfDispPath;
sys/dev/drm/radeon/atombios.h
4038
UCHAR ucVersion;
sys/dev/drm/radeon/atombios.h
4039
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
4054
UCHAR ucNumberOfObjects;
sys/dev/drm/radeon/atombios.h
4055
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
4061
UCHAR ucNumberOfSrc;
sys/dev/drm/radeon/atombios.h
4063
UCHAR ucNumberOfDst;
sys/dev/drm/radeon/atombios.h
4099
UCHAR ucDP_Lane3_Source:2;
sys/dev/drm/radeon/atombios.h
4100
UCHAR ucDP_Lane2_Source:2;
sys/dev/drm/radeon/atombios.h
4101
UCHAR ucDP_Lane1_Source:2;
sys/dev/drm/radeon/atombios.h
4102
UCHAR ucDP_Lane0_Source:2;
sys/dev/drm/radeon/atombios.h
4104
UCHAR ucDP_Lane0_Source:2;
sys/dev/drm/radeon/atombios.h
4105
UCHAR ucDP_Lane1_Source:2;
sys/dev/drm/radeon/atombios.h
4106
UCHAR ucDP_Lane2_Source:2;
sys/dev/drm/radeon/atombios.h
4107
UCHAR ucDP_Lane3_Source:2;
sys/dev/drm/radeon/atombios.h
411
UCHAR ucAction; //0:reserved //1:Memory //2:Engine
sys/dev/drm/radeon/atombios.h
4119
UCHAR ucDVI_CLK_Source:2;
sys/dev/drm/radeon/atombios.h
412
UCHAR ucReserved; //may expand to return larger Fbdiv later
sys/dev/drm/radeon/atombios.h
4120
UCHAR ucDVI_DATA0_Source:2;
sys/dev/drm/radeon/atombios.h
4121
UCHAR ucDVI_DATA1_Source:2;
sys/dev/drm/radeon/atombios.h
4122
UCHAR ucDVI_DATA2_Source:2;
sys/dev/drm/radeon/atombios.h
4124
UCHAR ucDVI_DATA2_Source:2;
sys/dev/drm/radeon/atombios.h
4125
UCHAR ucDVI_DATA1_Source:2;
sys/dev/drm/radeon/atombios.h
4126
UCHAR ucDVI_DATA0_Source:2;
sys/dev/drm/radeon/atombios.h
4127
UCHAR ucDVI_CLK_Source:2;
sys/dev/drm/radeon/atombios.h
413
UCHAR ucFbDiv; //return value
sys/dev/drm/radeon/atombios.h
4136
UCHAR ucExtAUXDDCLutIndex; //An index into external AUX/DDC channel LUT
sys/dev/drm/radeon/atombios.h
4137
UCHAR ucExtHPDPINLutIndex; //An index into external HPD pin LUT
sys/dev/drm/radeon/atombios.h
414
UCHAR ucPostDiv; //return value
sys/dev/drm/radeon/atombios.h
4140
UCHAR ucChannelMapping; // if ucChannelMapping=0, using default one to one mapping
sys/dev/drm/radeon/atombios.h
4144
UCHAR ucChPNInvert; // bit vector for up to 8 lanes, =0: P and N is not invert, =1 P and N is inverted
sys/dev/drm/radeon/atombios.h
4159
UCHAR ucGuid [NUMBER_OF_UCHAR_FOR_GUID]; // a GUID is a 16 byte long string
sys/dev/drm/radeon/atombios.h
4161
UCHAR ucChecksum; // a simple Checksum of the sum of whole structure equal to 0x0.
sys/dev/drm/radeon/atombios.h
4162
UCHAR uc3DStereoPinId; // use for eDP panel
sys/dev/drm/radeon/atombios.h
4163
UCHAR ucRemoteDisplayConfig;
sys/dev/drm/radeon/atombios.h
4164
UCHAR uceDPToLVDSRxId;
sys/dev/drm/radeon/atombios.h
4165
UCHAR ucFixDPVoltageSwing; // usCaps[1]=1, this indicate DP_LANE_SET value
sys/dev/drm/radeon/atombios.h
4166
UCHAR Reserved[3]; // for potential expansion
sys/dev/drm/radeon/atombios.h
4172
UCHAR ucRecordType; //An emun to indicate the record type
sys/dev/drm/radeon/atombios.h
4173
UCHAR ucRecordSize; //The size of the whole record in byte
sys/dev/drm/radeon/atombios.h
420
UCHAR ucAction; //0:reserved;COMPUTE_MEMORY_PLL_PARAM:Memory;COMPUTE_ENGINE_PLL_PARAM:Engine. it return ref_div to be written to register
sys/dev/drm/radeon/atombios.h
4206
UCHAR ucI2CAddr; //The slave address, it's 0 when the record is attached to connector for DDC
sys/dev/drm/radeon/atombios.h
4212
UCHAR ucHPDIntGPIOID; //Corresponding block in GPIO_PIN_INFO table gives the pin info
sys/dev/drm/radeon/atombios.h
4213
UCHAR ucPlugged_PinState;
sys/dev/drm/radeon/atombios.h
422
UCHAR ucPostDiv; //return post div to be written to register
sys/dev/drm/radeon/atombios.h
4220
UCHAR ucProtectionFlag;
sys/dev/drm/radeon/atombios.h
4221
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4234
UCHAR ucNumberOfDevice;
sys/dev/drm/radeon/atombios.h
4235
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4243
UCHAR ucConfigGPIOID;
sys/dev/drm/radeon/atombios.h
4244
UCHAR ucConfigGPIOState; //Set to 1 when it's active high to enable external flow in
sys/dev/drm/radeon/atombios.h
4245
UCHAR ucFlowinGPIPID;
sys/dev/drm/radeon/atombios.h
4246
UCHAR ucExtInGPIPID;
sys/dev/drm/radeon/atombios.h
4252
UCHAR ucCTL1GPIO_ID;
sys/dev/drm/radeon/atombios.h
4253
UCHAR ucCTL1GPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4254
UCHAR ucCTL2GPIO_ID;
sys/dev/drm/radeon/atombios.h
4255
UCHAR ucCTL2GPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4256
UCHAR ucCTL3GPIO_ID;
sys/dev/drm/radeon/atombios.h
4257
UCHAR ucCTL3GPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4258
UCHAR ucCTLFPGA_IN_ID;
sys/dev/drm/radeon/atombios.h
4259
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
4265
UCHAR ucGPIOID; //Corresponding block in GPIO_PIN_INFO table gives the pin info
sys/dev/drm/radeon/atombios.h
4266
UCHAR ucTVActiveState; //Indicating when the pin==0 or 1 when TV is connected
sys/dev/drm/radeon/atombios.h
4272
UCHAR ucTMSGPIO_ID;
sys/dev/drm/radeon/atombios.h
4273
UCHAR ucTMSGPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4274
UCHAR ucTCKGPIO_ID;
sys/dev/drm/radeon/atombios.h
4275
UCHAR ucTCKGPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4276
UCHAR ucTDOGPIO_ID;
sys/dev/drm/radeon/atombios.h
4277
UCHAR ucTDOGPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4278
UCHAR ucTDIGPIO_ID;
sys/dev/drm/radeon/atombios.h
4279
UCHAR ucTDIGPIOState; //Set to 1 when it's active high
sys/dev/drm/radeon/atombios.h
4280
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
4287
UCHAR ucGPIOID; // GPIO_ID, find the corresponding ID in GPIO_LUT table
sys/dev/drm/radeon/atombios.h
4288
UCHAR ucGPIO_PinState; // Pin state showing how to set-up the pin
sys/dev/drm/radeon/atombios.h
4294
UCHAR ucFlags; // Future expnadibility
sys/dev/drm/radeon/atombios.h
4295
UCHAR ucNumberOfPins; // Number of GPIO pins used to control the object
sys/dev/drm/radeon/atombios.h
4327
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
4361
UCHAR ucFlowCntlGpioId;
sys/dev/drm/radeon/atombios.h
4362
UCHAR ucSwapCntlGpioId;
sys/dev/drm/radeon/atombios.h
4363
UCHAR ucConnectedDvoBundle;
sys/dev/drm/radeon/atombios.h
4364
UCHAR ucPadding;
sys/dev/drm/radeon/atombios.h
4376
UCHAR ucSubConnectorType; //CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D|X_ID_DUAL_LINK_DVI_D|HDMI_TYPE_A
sys/dev/drm/radeon/atombios.h
4377
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4384
UCHAR ucMuxType; //decide the number of ucMuxState, =0, no pin state, =1: single state with complement, >1: multiple state
sys/dev/drm/radeon/atombios.h
4385
UCHAR ucMuxControlPin;
sys/dev/drm/radeon/atombios.h
4386
UCHAR ucMuxState[2]; //for alligment purpose
sys/dev/drm/radeon/atombios.h
4392
UCHAR ucMuxType;
sys/dev/drm/radeon/atombios.h
4393
UCHAR ucMuxControlPin;
sys/dev/drm/radeon/atombios.h
4394
UCHAR ucMuxState[2]; //for alligment purpose
sys/dev/drm/radeon/atombios.h
4404
UCHAR ucHPDPINMap[MAX_NUMBER_OF_EXT_HPDPIN_LUT_ENTRIES]; //An fixed size array which maps external pins to internal GPIO_PIN_INFO table
sys/dev/drm/radeon/atombios.h
4428
UCHAR ucConnectorType;
sys/dev/drm/radeon/atombios.h
4429
UCHAR ucPosition;
sys/dev/drm/radeon/atombios.h
4443
UCHAR ucLength;
sys/dev/drm/radeon/atombios.h
4444
UCHAR ucWidth;
sys/dev/drm/radeon/atombios.h
4445
UCHAR ucConnNum;
sys/dev/drm/radeon/atombios.h
4446
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4457
UCHAR ucNumOfVoltageEntries;
sys/dev/drm/radeon/atombios.h
4458
UCHAR ucBytesPerVoltageEntry;
sys/dev/drm/radeon/atombios.h
4459
UCHAR ucVoltageStep; //Indicating in how many mv increament is one step, 0.5mv unit
sys/dev/drm/radeon/atombios.h
4460
UCHAR ucDefaultVoltageEntry;
sys/dev/drm/radeon/atombios.h
4461
UCHAR ucVoltageControlI2cLine;
sys/dev/drm/radeon/atombios.h
4462
UCHAR ucVoltageControlAddress;
sys/dev/drm/radeon/atombios.h
4463
UCHAR ucVoltageControlOffset;
sys/dev/drm/radeon/atombios.h
4470
UCHAR ucVoltageEntries[64]; //64 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries*ucBytesPerVoltageEntry
sys/dev/drm/radeon/atombios.h
4478
UCHAR ucNumOfVoltageEntries; // Number of Voltage Entry, which indicate max Voltage
sys/dev/drm/radeon/atombios.h
4479
UCHAR ucFlag; // bit0=0 :step is 1mv =1 0.5mv
sys/dev/drm/radeon/atombios.h
4480
UCHAR ucBaseVID; // if there is no lookup table, VID= BaseVID + ( Vol - BaseLevle ) /VoltageStep
sys/dev/drm/radeon/atombios.h
4481
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4482
UCHAR ucVIDAdjustEntries[32]; // 32 is for allocation, the actual number of entry is present at ucNumOfVoltageEntries
sys/dev/drm/radeon/atombios.h
4493
UCHAR ucNumOfVoltageEntries; // Number of Voltage Entry, which indicate max Voltage
sys/dev/drm/radeon/atombios.h
4494
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
4500
UCHAR ucVoltageControlId; //Indicate it is controlled by I2C or GPIO or HW state machine
sys/dev/drm/radeon/atombios.h
4501
UCHAR ucVoltageControlI2cLine;
sys/dev/drm/radeon/atombios.h
4502
UCHAR ucVoltageControlAddress;
sys/dev/drm/radeon/atombios.h
4503
UCHAR ucVoltageControlOffset;
sys/dev/drm/radeon/atombios.h
4505
UCHAR ucGpioPinBitShift[9]; //at most 8 pin support 255 VIDs, termintate with 0xff
sys/dev/drm/radeon/atombios.h
4506
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4533
UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
sys/dev/drm/radeon/atombios.h
4534
UCHAR ucSize; //Size of Object
sys/dev/drm/radeon/atombios.h
4541
UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
sys/dev/drm/radeon/atombios.h
4542
UCHAR ucSize; //Size of Object
sys/dev/drm/radeon/atombios.h
4561
UCHAR ucLeakageId;
sys/dev/drm/radeon/atombios.h
4562
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4567
UCHAR ucVoltageType; //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
sys/dev/drm/radeon/atombios.h
4568
UCHAR ucVoltageMode; //Indicate voltage control mode: Init/Set/Leakage/Set phase
sys/dev/drm/radeon/atombios.h
4598
UCHAR ucVoltageRegulatorId; //Indicate Voltage Regulator Id
sys/dev/drm/radeon/atombios.h
4599
UCHAR ucVoltageControlI2cLine;
sys/dev/drm/radeon/atombios.h
4600
UCHAR ucVoltageControlAddress;
sys/dev/drm/radeon/atombios.h
4601
UCHAR ucVoltageControlOffset;
sys/dev/drm/radeon/atombios.h
4613
UCHAR ucVoltageGpioCntlId; // default is 0 which indicate control through CG VID mode
sys/dev/drm/radeon/atombios.h
4614
UCHAR ucGpioEntryNum; // indiate the entry numbers of Votlage/Gpio value Look up table
sys/dev/drm/radeon/atombios.h
4615
UCHAR ucPhaseDelay; // phase delay in unit of micro second
sys/dev/drm/radeon/atombios.h
4616
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4624
UCHAR ucLeakageCntlId; // default is 0
sys/dev/drm/radeon/atombios.h
4625
UCHAR ucLeakageEntryNum; // indicate the entry number of LeakageId/Voltage Lut table
sys/dev/drm/radeon/atombios.h
4626
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
4642
UCHAR ucSVDGpioId; //0~31 indicate GPIO0~31
sys/dev/drm/radeon/atombios.h
4643
UCHAR ucSVCGpioId; //0~31 indicate GPIO0~31
sys/dev/drm/radeon/atombios.h
466
UCHAR ucRefDiv; //Output Parameter
sys/dev/drm/radeon/atombios.h
4662
UCHAR ucProfileId;
sys/dev/drm/radeon/atombios.h
4663
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
467
UCHAR ucPostDiv; //Output Parameter
sys/dev/drm/radeon/atombios.h
468
UCHAR ucCntlFlag; //Output Parameter
sys/dev/drm/radeon/atombios.h
4684
UCHAR ucLeakageBinNum; // indicate the entry number of LeakageId/Voltage Lut table
sys/dev/drm/radeon/atombios.h
4687
UCHAR ucElbVDDC_Num;
sys/dev/drm/radeon/atombios.h
469
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
4691
UCHAR ucElbVDDCI_Num;
sys/dev/drm/radeon/atombios.h
4741
UCHAR ucPwrSrcId; // Power source
sys/dev/drm/radeon/atombios.h
4742
UCHAR ucPwrSensorType; // GPIO, I2C or none
sys/dev/drm/radeon/atombios.h
4743
UCHAR ucPwrSensId; // if GPIO detect, it is GPIO id, if I2C detect, it is I2C id
sys/dev/drm/radeon/atombios.h
4744
UCHAR ucPwrSensSlaveAddr; // Slave address if I2C detect
sys/dev/drm/radeon/atombios.h
4745
UCHAR ucPwrSensRegIndex; // I2C register Index if I2C detect
sys/dev/drm/radeon/atombios.h
4746
UCHAR ucPwrSensRegBitMask; // detect which bit is used if I2C detect
sys/dev/drm/radeon/atombios.h
4747
UCHAR ucPwrSensActiveState; // high active or low active
sys/dev/drm/radeon/atombios.h
4748
UCHAR ucReserve[3]; // reserve
sys/dev/drm/radeon/atombios.h
4755
UCHAR asPwrbehave[16];
sys/dev/drm/radeon/atombios.h
4801
UCHAR ucHtcTmpLmt;
sys/dev/drm/radeon/atombios.h
4802
UCHAR ucHtcHystLmt;
sys/dev/drm/radeon/atombios.h
4811
UCHAR ucMemoryType;
sys/dev/drm/radeon/atombios.h
4812
UCHAR ucUMAChannelNumber;
sys/dev/drm/radeon/atombios.h
4835
UCHAR ulBoostVid_2bit;
sys/dev/drm/radeon/atombios.h
4836
UCHAR EnableBoost;
sys/dev/drm/radeon/atombios.h
4839
UCHAR ucLvdsMisc;
sys/dev/drm/radeon/atombios.h
4840
UCHAR ucLVDSReserved;
sys/dev/drm/radeon/atombios.h
49
#ifndef UCHAR
sys/dev/drm/radeon/atombios.h
499
UCHAR ucRefDiv; //Output Parameter
sys/dev/drm/radeon/atombios.h
4999
UCHAR ucHtcTmpLmt;
sys/dev/drm/radeon/atombios.h
500
UCHAR ucPostDiv; //Output Parameter
sys/dev/drm/radeon/atombios.h
5000
UCHAR ucHtcHystLmt;
sys/dev/drm/radeon/atombios.h
5009
UCHAR ucMemoryType;
sys/dev/drm/radeon/atombios.h
5010
UCHAR ucUMAChannelNumber;
sys/dev/drm/radeon/atombios.h
5011
UCHAR strVBIOSMsg[40];
sys/dev/drm/radeon/atombios.h
503
UCHAR ucCntlFlag; //Output Flags
sys/dev/drm/radeon/atombios.h
5033
UCHAR ulBoostVid_2bit;
sys/dev/drm/radeon/atombios.h
5034
UCHAR EnableBoost;
sys/dev/drm/radeon/atombios.h
5037
UCHAR ucLvdsMisc;
sys/dev/drm/radeon/atombios.h
5038
UCHAR ucTravisLVDSVolAdjust;
sys/dev/drm/radeon/atombios.h
5039
UCHAR ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
sys/dev/drm/radeon/atombios.h
504
UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0) mode
sys/dev/drm/radeon/atombios.h
5040
UCHAR ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
sys/dev/drm/radeon/atombios.h
5041
UCHAR ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
sys/dev/drm/radeon/atombios.h
5042
UCHAR ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
sys/dev/drm/radeon/atombios.h
5043
UCHAR ucLVDSOffToOnDelay_in4Ms;
sys/dev/drm/radeon/atombios.h
5044
UCHAR ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
sys/dev/drm/radeon/atombios.h
5045
UCHAR ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
sys/dev/drm/radeon/atombios.h
5046
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
5052
UCHAR ucNBDPMEnable;
sys/dev/drm/radeon/atombios.h
5053
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
5054
UCHAR ucDPMState0VclkFid;
sys/dev/drm/radeon/atombios.h
5055
UCHAR ucDPMState0DclkFid;
sys/dev/drm/radeon/atombios.h
5056
UCHAR ucDPMState1VclkFid;
sys/dev/drm/radeon/atombios.h
5057
UCHAR ucDPMState1DclkFid;
sys/dev/drm/radeon/atombios.h
5058
UCHAR ucDPMState2VclkFid;
sys/dev/drm/radeon/atombios.h
5059
UCHAR ucDPMState2DclkFid;
sys/dev/drm/radeon/atombios.h
506
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
5060
UCHAR ucDPMState3VclkFid;
sys/dev/drm/radeon/atombios.h
5061
UCHAR ucDPMState3DclkFid;
sys/dev/drm/radeon/atombios.h
5226
UCHAR ucHtcTmpLmt;
sys/dev/drm/radeon/atombios.h
5227
UCHAR ucHtcHystLmt;
sys/dev/drm/radeon/atombios.h
5235
UCHAR ucMemoryType;
sys/dev/drm/radeon/atombios.h
5236
UCHAR ucUMAChannelNumber;
sys/dev/drm/radeon/atombios.h
5237
UCHAR strVBIOSMsg[40];
sys/dev/drm/radeon/atombios.h
525
UCHAR ucPllRefDiv; //Output Parameter: PLL ref divider
sys/dev/drm/radeon/atombios.h
5258
UCHAR ucLvdsMisc;
sys/dev/drm/radeon/atombios.h
5259
UCHAR ucTravisLVDSVolAdjust;
sys/dev/drm/radeon/atombios.h
526
UCHAR ucPllPostDiv; //Output Parameter: PLL post divider
sys/dev/drm/radeon/atombios.h
5260
UCHAR ucLVDSPwrOnSeqDIGONtoDE_in4Ms;
sys/dev/drm/radeon/atombios.h
5261
UCHAR ucLVDSPwrOnSeqDEtoVARY_BL_in4Ms;
sys/dev/drm/radeon/atombios.h
5262
UCHAR ucLVDSPwrOffSeqVARY_BLtoDE_in4Ms;
sys/dev/drm/radeon/atombios.h
5263
UCHAR ucLVDSPwrOffSeqDEtoDIGON_in4Ms;
sys/dev/drm/radeon/atombios.h
5264
UCHAR ucLVDSOffToOnDelay_in4Ms;
sys/dev/drm/radeon/atombios.h
5265
UCHAR ucLVDSPwrOnSeqVARY_BLtoBLON_in4Ms;
sys/dev/drm/radeon/atombios.h
5266
UCHAR ucLVDSPwrOffSeqBLONtoVARY_BL_in4Ms;
sys/dev/drm/radeon/atombios.h
5267
UCHAR ucMinAllowedBL_Level;
sys/dev/drm/radeon/atombios.h
527
UCHAR ucPllCntlFlag; //Output Flags: control flag
sys/dev/drm/radeon/atombios.h
528
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
5442
UCHAR ucNunberOfBytes; //Indicates how many bytes SW needs to write to the external ASIC for one block, besides to "Start" and "Stop"
sys/dev/drm/radeon/atombios.h
5443
UCHAR ucI2CData[1]; //I2C data in bytes, should be less than 16 bytes usually
sys/dev/drm/radeon/atombios.h
5451
UCHAR ucSSChipID; //SS chip being used
sys/dev/drm/radeon/atombios.h
5452
UCHAR ucSSChipSlaveAddr; //Slave Address to set up this SS chip
sys/dev/drm/radeon/atombios.h
5453
UCHAR ucNumOfI2CDataRecords; //number of data block
sys/dev/drm/radeon/atombios.h
546
UCHAR ucDllSpeed; //Output
sys/dev/drm/radeon/atombios.h
547
UCHAR ucPostDiv; //Output
sys/dev/drm/radeon/atombios.h
5475
UCHAR ucClockIndication; //Indicate which clock source needs SS
sys/dev/drm/radeon/atombios.h
5476
UCHAR ucSpreadSpectrumMode; //Bit1=0 Down Spread,=1 Center Spread.
sys/dev/drm/radeon/atombios.h
5477
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
549
UCHAR ucInputFlag; //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
sys/dev/drm/radeon/atombios.h
550
UCHAR ucPllCntlFlag; //Output:
sys/dev/drm/radeon/atombios.h
5501
UCHAR ucClockIndication; //Indicate which clock source needs SS
sys/dev/drm/radeon/atombios.h
5502
UCHAR ucSpreadSpectrumMode; //Bit0=0 Down Spread,=1 Center Spread, bit1=0: internal SS bit1=1: external SS
sys/dev/drm/radeon/atombios.h
5503
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
552
UCHAR ucBWCntl;
sys/dev/drm/radeon/atombios.h
5532
UCHAR ucClockIndication; //Indicate which clock source needs SS
sys/dev/drm/radeon/atombios.h
5533
UCHAR ucSpreadSpectrumMode; //Bit0=0 Down Spread,=1 Center Spread, bit1=0: internal SS bit1=1: external SS
sys/dev/drm/radeon/atombios.h
5534
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
6005
UCHAR ucAction; //not define yet
sys/dev/drm/radeon/atombios.h
6006
UCHAR ucFbDiv_Hi; //Fbdiv Hi byte
sys/dev/drm/radeon/atombios.h
6007
UCHAR ucFbDiv; //FB value
sys/dev/drm/radeon/atombios.h
6008
UCHAR ucPostDiv; //Post div
sys/dev/drm/radeon/atombios.h
6019
UCHAR ucGPIO_ID; //return value, read from GPIO pins
sys/dev/drm/radeon/atombios.h
6020
UCHAR ucGPIOBitShift; //define which bit in uGPIOBitVal need to be update
sys/dev/drm/radeon/atombios.h
6021
UCHAR ucGPIOBitVal; //Set/Reset corresponding bit defined in ucGPIOBitMask
sys/dev/drm/radeon/atombios.h
6022
UCHAR ucAction; //=GPIO_PIN_WRITE: Read; =GPIO_PIN_READ: Write
sys/dev/drm/radeon/atombios.h
6027
UCHAR ucScaler; // ATOM_SCALER1, ATOM_SCALER2
sys/dev/drm/radeon/atombios.h
6028
UCHAR ucEnable; // ATOM_SCALER_DISABLE or ATOM_SCALER_CENTER or ATOM_SCALER_EXPANSION
sys/dev/drm/radeon/atombios.h
6029
UCHAR ucTVStandard; //
sys/dev/drm/radeon/atombios.h
6030
UCHAR ucPadding[1];
sys/dev/drm/radeon/atombios.h
6043
UCHAR ucHWIconVertOffset; // Hardware Icon Vertical offset
sys/dev/drm/radeon/atombios.h
6044
UCHAR ucHWIconHorzOffset; // Hardware Icon Horizontal offset
sys/dev/drm/radeon/atombios.h
6045
UCHAR ucSelection; // ATOM_CURSOR1 or ATOM_ICON1 or ATOM_CURSOR2 or ATOM_ICON2
sys/dev/drm/radeon/atombios.h
6046
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
6059
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/radeon/atombios.h
6060
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
6067
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/radeon/atombios.h
6068
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
6069
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
6076
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/radeon/atombios.h
6077
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
6086
UCHAR ucColorDepth;
sys/dev/drm/radeon/atombios.h
6087
UCHAR ucPixelFormat;
sys/dev/drm/radeon/atombios.h
6088
UCHAR ucSurface; // Surface 1 or 2
sys/dev/drm/radeon/atombios.h
6089
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
6090
UCHAR ucModeType;
sys/dev/drm/radeon/atombios.h
6091
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
6131
UCHAR ucLutId;
sys/dev/drm/radeon/atombios.h
6132
UCHAR ucAction;
sys/dev/drm/radeon/atombios.h
6146
UCHAR ucInterruptId;
sys/dev/drm/radeon/atombios.h
6147
UCHAR ucServiceId;
sys/dev/drm/radeon/atombios.h
6148
UCHAR ucStatus;
sys/dev/drm/radeon/atombios.h
6149
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
6172
UCHAR IOAccessSequence[256];
sys/dev/drm/radeon/atombios.h
6207
UCHAR ucVMode_Num; //Video mode number
sys/dev/drm/radeon/atombios.h
6208
UCHAR ucTV_Mode_Num; //Internal TV mode number
sys/dev/drm/radeon/atombios.h
6226
UCHAR ucTV_Mode_Num;
sys/dev/drm/radeon/atombios.h
6258
UCHAR ucMemoryType;
sys/dev/drm/radeon/atombios.h
6259
UCHAR ucMemoryVendor;
sys/dev/drm/radeon/atombios.h
6260
UCHAR ucAdjMCId;
sys/dev/drm/radeon/atombios.h
6261
UCHAR ucDynClkId;
sys/dev/drm/radeon/atombios.h
627
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
628
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
6291
UCHAR ucPreRegDataLength; // offset in ATOM_INIT_REG_DATA_BLOCK.saRegDataBuf
sys/dev/drm/radeon/atombios.h
637
UCHAR ucDispPipeId; // ATOM_CRTC1, ATOM_CRTC2, ...
sys/dev/drm/radeon/atombios.h
6376
UCHAR ucRevision;
sys/dev/drm/radeon/atombios.h
6377
UCHAR ucChecksum;
sys/dev/drm/radeon/atombios.h
6378
UCHAR ucReserved1;
sys/dev/drm/radeon/atombios.h
6379
UCHAR ucReserved2;
sys/dev/drm/radeon/atombios.h
638
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
639
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
6397
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/radeon/atombios.h
6398
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] reserved;
sys/dev/drm/radeon/atombios.h
6399
UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender
sys/dev/drm/radeon/atombios.h
6400
UCHAR ucMemoryDeviceCfg; // [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32...
sys/dev/drm/radeon/atombios.h
6401
UCHAR ucRow; // Number of Row,in power of 2;
sys/dev/drm/radeon/atombios.h
6402
UCHAR ucColumn; // Number of Column,in power of 2;
sys/dev/drm/radeon/atombios.h
6403
UCHAR ucBank; // Nunber of Bank;
sys/dev/drm/radeon/atombios.h
6404
UCHAR ucRank; // Number of Rank, in power of 2
sys/dev/drm/radeon/atombios.h
6405
UCHAR ucChannelNum; // Number of channel;
sys/dev/drm/radeon/atombios.h
6406
UCHAR ucChannelConfig; // [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2
sys/dev/drm/radeon/atombios.h
6407
UCHAR ucDefaultMVDDQ_ID; // Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data;
sys/dev/drm/radeon/atombios.h
6408
UCHAR ucDefaultMVDDC_ID; // Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data;
sys/dev/drm/radeon/atombios.h
6409
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
6424
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/radeon/atombios.h
6425
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now;
sys/dev/drm/radeon/atombios.h
6426
UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed
sys/dev/drm/radeon/atombios.h
6427
UCHAR ucMemoryDeviceCfg; // [7:4]=0x0:4M;=0x1:8M;=0x2:16M;0x3:32M....[3:0]=0x0:x4;=0x1:x8;=0x2:x16;=0x3:x32...
sys/dev/drm/radeon/atombios.h
6428
UCHAR ucRow; // Number of Row,in power of 2;
sys/dev/drm/radeon/atombios.h
6429
UCHAR ucColumn; // Number of Column,in power of 2;
sys/dev/drm/radeon/atombios.h
6430
UCHAR ucBank; // Nunber of Bank;
sys/dev/drm/radeon/atombios.h
6431
UCHAR ucRank; // Number of Rank, in power of 2
sys/dev/drm/radeon/atombios.h
6432
UCHAR ucChannelNum; // Number of channel;
sys/dev/drm/radeon/atombios.h
6433
UCHAR ucChannelConfig; // [3:0]=Indication of what channel combination;[4:7]=Channel bit width, in number of 2
sys/dev/drm/radeon/atombios.h
6434
UCHAR ucDefaultMVDDQ_ID; // Default MVDDQ setting for this memory block, ID linking to MVDDQ info table to find real set-up data;
sys/dev/drm/radeon/atombios.h
6435
UCHAR ucDefaultMVDDC_ID; // Default MVDDC setting for this memory block, ID linking to MVDDC info table to find real set-up data;
sys/dev/drm/radeon/atombios.h
6436
UCHAR ucRefreshRateFactor;
sys/dev/drm/radeon/atombios.h
6437
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
6452
UCHAR ucCL; // CAS latency
sys/dev/drm/radeon/atombios.h
6453
UCHAR ucWL; // WRITE Latency
sys/dev/drm/radeon/atombios.h
6454
UCHAR uctRAS; // tRAS
sys/dev/drm/radeon/atombios.h
6455
UCHAR uctRC; // tRC
sys/dev/drm/radeon/atombios.h
6456
UCHAR uctRFC; // tRFC
sys/dev/drm/radeon/atombios.h
6457
UCHAR uctRCDR; // tRCDR
sys/dev/drm/radeon/atombios.h
6458
UCHAR uctRCDW; // tRCDW
sys/dev/drm/radeon/atombios.h
6459
UCHAR uctRP; // tRP
sys/dev/drm/radeon/atombios.h
6460
UCHAR uctRRD; // tRRD
sys/dev/drm/radeon/atombios.h
6461
UCHAR uctWR; // tWR
sys/dev/drm/radeon/atombios.h
6462
UCHAR uctWTR; // tWTR
sys/dev/drm/radeon/atombios.h
6463
UCHAR uctPDIX; // tPDIX
sys/dev/drm/radeon/atombios.h
6464
UCHAR uctFAW; // tFAW
sys/dev/drm/radeon/atombios.h
6465
UCHAR uctAOND; // tAOND
sys/dev/drm/radeon/atombios.h
6469
UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon
sys/dev/drm/radeon/atombios.h
647
UCHAR ucEnable; // ATOM_ENABLE or ATOM_DISABLE
sys/dev/drm/radeon/atombios.h
6470
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
648
UCHAR ucPadding[3];
sys/dev/drm/radeon/atombios.h
6482
UCHAR ucCL; // CAS latency
sys/dev/drm/radeon/atombios.h
6483
UCHAR ucWL; // WRITE Latency
sys/dev/drm/radeon/atombios.h
6484
UCHAR uctRAS; // tRAS
sys/dev/drm/radeon/atombios.h
6485
UCHAR uctRC; // tRC
sys/dev/drm/radeon/atombios.h
6486
UCHAR uctRFC; // tRFC
sys/dev/drm/radeon/atombios.h
6487
UCHAR uctRCDR; // tRCDR
sys/dev/drm/radeon/atombios.h
6488
UCHAR uctRCDW; // tRCDW
sys/dev/drm/radeon/atombios.h
6489
UCHAR uctRP; // tRP
sys/dev/drm/radeon/atombios.h
6490
UCHAR uctRRD; // tRRD
sys/dev/drm/radeon/atombios.h
6491
UCHAR uctWR; // tWR
sys/dev/drm/radeon/atombios.h
6492
UCHAR uctWTR; // tWTR
sys/dev/drm/radeon/atombios.h
6493
UCHAR uctPDIX; // tPDIX
sys/dev/drm/radeon/atombios.h
6494
UCHAR uctFAW; // tFAW
sys/dev/drm/radeon/atombios.h
6495
UCHAR uctAOND; // tAOND
sys/dev/drm/radeon/atombios.h
6496
UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon
sys/dev/drm/radeon/atombios.h
6498
UCHAR uctCCDL; //
sys/dev/drm/radeon/atombios.h
6499
UCHAR uctCRCRL; //
sys/dev/drm/radeon/atombios.h
6500
UCHAR uctCRCWL; //
sys/dev/drm/radeon/atombios.h
6501
UCHAR uctCKE; //
sys/dev/drm/radeon/atombios.h
6502
UCHAR uctCKRSE; //
sys/dev/drm/radeon/atombios.h
6503
UCHAR uctCKRSX; //
sys/dev/drm/radeon/atombios.h
6504
UCHAR uctFAW32; //
sys/dev/drm/radeon/atombios.h
6505
UCHAR ucMR5lo; //
sys/dev/drm/radeon/atombios.h
6506
UCHAR ucMR5hi; //
sys/dev/drm/radeon/atombios.h
6507
UCHAR ucTerminator;
sys/dev/drm/radeon/atombios.h
6515
UCHAR ucCL; // CAS latency
sys/dev/drm/radeon/atombios.h
6516
UCHAR ucWL; // WRITE Latency
sys/dev/drm/radeon/atombios.h
6517
UCHAR uctRAS; // tRAS
sys/dev/drm/radeon/atombios.h
6518
UCHAR uctRC; // tRC
sys/dev/drm/radeon/atombios.h
6519
UCHAR uctRFC; // tRFC
sys/dev/drm/radeon/atombios.h
6520
UCHAR uctRCDR; // tRCDR
sys/dev/drm/radeon/atombios.h
6521
UCHAR uctRCDW; // tRCDW
sys/dev/drm/radeon/atombios.h
6522
UCHAR uctRP; // tRP
sys/dev/drm/radeon/atombios.h
6523
UCHAR uctRRD; // tRRD
sys/dev/drm/radeon/atombios.h
6524
UCHAR uctWR; // tWR
sys/dev/drm/radeon/atombios.h
6525
UCHAR uctWTR; // tWTR
sys/dev/drm/radeon/atombios.h
6526
UCHAR uctPDIX; // tPDIX
sys/dev/drm/radeon/atombios.h
6527
UCHAR uctFAW; // tFAW
sys/dev/drm/radeon/atombios.h
6528
UCHAR uctAOND; // tAOND
sys/dev/drm/radeon/atombios.h
6529
UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon
sys/dev/drm/radeon/atombios.h
6531
UCHAR uctCCDL; //
sys/dev/drm/radeon/atombios.h
6532
UCHAR uctCRCRL; //
sys/dev/drm/radeon/atombios.h
6533
UCHAR uctCRCWL; //
sys/dev/drm/radeon/atombios.h
6534
UCHAR uctCKE; //
sys/dev/drm/radeon/atombios.h
6535
UCHAR uctCKRSE; //
sys/dev/drm/radeon/atombios.h
6536
UCHAR uctCKRSX; //
sys/dev/drm/radeon/atombios.h
6537
UCHAR uctFAW32; //
sys/dev/drm/radeon/atombios.h
6538
UCHAR ucMR4lo; //
sys/dev/drm/radeon/atombios.h
6539
UCHAR ucMR4hi; //
sys/dev/drm/radeon/atombios.h
6540
UCHAR ucMR5lo; //
sys/dev/drm/radeon/atombios.h
6541
UCHAR ucMR5hi; //
sys/dev/drm/radeon/atombios.h
6542
UCHAR ucTerminator;
sys/dev/drm/radeon/atombios.h
6543
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
6557
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4;[3:0] - must not be used for now;
sys/dev/drm/radeon/atombios.h
6558
UCHAR ucMemoryVenderID; // Predefined,never change across designs or memory type/vender. If not predefined, vendor detection table gets executed
sys/dev/drm/radeon/atombios.h
6559
UCHAR ucRow; // Number of Row,in power of 2;
sys/dev/drm/radeon/atombios.h
6560
UCHAR ucColumn; // Number of Column,in power of 2;
sys/dev/drm/radeon/atombios.h
6561
UCHAR ucBank; // Nunber of Bank;
sys/dev/drm/radeon/atombios.h
6562
UCHAR ucRank; // Number of Rank, in power of 2
sys/dev/drm/radeon/atombios.h
6563
UCHAR ucBurstSize; // burst size, 0= burst size=4 1= burst size=8
sys/dev/drm/radeon/atombios.h
6564
UCHAR ucDllDisBit; // position of DLL Enable/Disable bit in EMRS ( Extended Mode Register )
sys/dev/drm/radeon/atombios.h
6565
UCHAR ucRefreshRateFactor; // memory refresh rate in unit of ms
sys/dev/drm/radeon/atombios.h
6566
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/radeon/atombios.h
6567
UCHAR ucPreamble; //[7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/radeon/atombios.h
6568
UCHAR ucMemAttrib; // Memory Device Addribute, like RDBI/WDBI etc
sys/dev/drm/radeon/atombios.h
6579
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/radeon/atombios.h
658
UCHAR ucDacType; //{ATOM_DAC_A,ATOM_DAC_B, ATOM_EXT_DAC}
sys/dev/drm/radeon/atombios.h
6580
UCHAR ucChannelNum; // board dependent parameter:Number of channel;
sys/dev/drm/radeon/atombios.h
6581
UCHAR ucChannelSize; // board dependent parameter:32bit or 64bit
sys/dev/drm/radeon/atombios.h
6582
UCHAR ucVREFI; // board dependnt parameter: EXT or INT +160mv to -140mv
sys/dev/drm/radeon/atombios.h
6583
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/radeon/atombios.h
6584
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/radeon/atombios.h
659
UCHAR ucMisc; //Valid only when table revision =1.3 and above
sys/dev/drm/radeon/atombios.h
6602
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/radeon/atombios.h
6603
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now;
sys/dev/drm/radeon/atombios.h
6604
UCHAR ucChannelNum; // Number of channels present in this module config
sys/dev/drm/radeon/atombios.h
6605
UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits
sys/dev/drm/radeon/atombios.h
6606
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/radeon/atombios.h
6607
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/radeon/atombios.h
6608
UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8
sys/dev/drm/radeon/atombios.h
6609
UCHAR ucVREFI; // board dependent parameter
sys/dev/drm/radeon/atombios.h
6610
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/radeon/atombios.h
6611
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/radeon/atombios.h
6612
UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!!
sys/dev/drm/radeon/atombios.h
6614
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
6625
UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed
sys/dev/drm/radeon/atombios.h
6626
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/radeon/atombios.h
6627
UCHAR ucReserved2[2];
sys/dev/drm/radeon/atombios.h
6644
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/radeon/atombios.h
6645
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now;
sys/dev/drm/radeon/atombios.h
6646
UCHAR ucChannelNum; // Number of channels present in this module config
sys/dev/drm/radeon/atombios.h
6647
UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits
sys/dev/drm/radeon/atombios.h
6648
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/radeon/atombios.h
6649
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/radeon/atombios.h
6650
UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8
sys/dev/drm/radeon/atombios.h
6651
UCHAR ucVREFI; // board dependent parameter
sys/dev/drm/radeon/atombios.h
6652
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/radeon/atombios.h
6653
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/radeon/atombios.h
6654
UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!!
sys/dev/drm/radeon/atombios.h
6656
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
6661
UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed
sys/dev/drm/radeon/atombios.h
6662
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/radeon/atombios.h
6663
UCHAR ucFIFODepth; // FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth
sys/dev/drm/radeon/atombios.h
6664
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/radeon/atombios.h
6675
UCHAR ucExtMemoryID; // An external indicator (by hardcode, callback or pin) to tell what is the current memory module
sys/dev/drm/radeon/atombios.h
6676
UCHAR ucMemoryType; // [7:4]=0x1:DDR1;=0x2:DDR2;=0x3:DDR3;=0x4:DDR4; 0x5:DDR5 [3:0] - Must be 0x0 for now;
sys/dev/drm/radeon/atombios.h
6677
UCHAR ucChannelNum; // Number of channels present in this module config
sys/dev/drm/radeon/atombios.h
6678
UCHAR ucChannelWidth; // 0 - 32 bits; 1 - 64 bits
sys/dev/drm/radeon/atombios.h
6679
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/radeon/atombios.h
6680
UCHAR ucFlag; // To enable/disable functionalities based on memory type
sys/dev/drm/radeon/atombios.h
6681
UCHAR ucMisc; // bit0: 0 - single rank; 1 - dual rank; bit2: 0 - burstlength 4, 1 - burstlength 8
sys/dev/drm/radeon/atombios.h
6682
UCHAR ucVREFI; // board dependent parameter
sys/dev/drm/radeon/atombios.h
6683
UCHAR ucNPL_RT; // board dependent parameter:NPL round trip delay, used for calculate memory timing parameters
sys/dev/drm/radeon/atombios.h
6684
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/radeon/atombios.h
6685
UCHAR ucMemorySize; // BIOS internal reserved space to optimize code size, updated by the compiler, shouldn't be modified manually!!
sys/dev/drm/radeon/atombios.h
6687
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
6692
UCHAR ucMemoryVenderID; // Predefined, If not predefined, vendor detection table gets executed
sys/dev/drm/radeon/atombios.h
6693
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/radeon/atombios.h
6694
UCHAR ucFIFODepth; // FIFO depth supposes to be detected during vendor detection, but if we dont do vendor detection we have to hardcode FIFO Depth
sys/dev/drm/radeon/atombios.h
6695
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/radeon/atombios.h
6706
UCHAR ucExtMemoryID; // Current memory module ID
sys/dev/drm/radeon/atombios.h
6707
UCHAR ucMemoryType; // MEM_TYPE_DDR2/DDR3/GDDR3/GDDR5
sys/dev/drm/radeon/atombios.h
6708
UCHAR ucChannelNum; // Number of mem. channels supported in this module
sys/dev/drm/radeon/atombios.h
6709
UCHAR ucChannelWidth; // CHANNEL_16BIT/CHANNEL_32BIT/CHANNEL_64BIT
sys/dev/drm/radeon/atombios.h
6710
UCHAR ucDensity; // _8Mx32, _16Mx32, _16Mx16, _32Mx16
sys/dev/drm/radeon/atombios.h
6711
UCHAR ucReserve; // Former container for Mx_FLAGS like DBI_AC_MODE_ENABLE_ASIC for GDDR4. Not used now.
sys/dev/drm/radeon/atombios.h
6712
UCHAR ucMisc; // RANK_OF_THISMEMORY etc.
sys/dev/drm/radeon/atombios.h
6713
UCHAR ucVREFI; // Not used.
sys/dev/drm/radeon/atombios.h
6714
UCHAR ucNPL_RT; // Round trip delay (MC_SEQ_CAS_TIMING [28:24]:TCL=CL+NPL_RT-2). Always 2.
sys/dev/drm/radeon/atombios.h
6715
UCHAR ucPreamble; // [7:4] Write Preamble, [3:0] Read Preamble
sys/dev/drm/radeon/atombios.h
6716
UCHAR ucMemorySize; // Total memory size in unit of 16MB for CONFIG_MEMSIZE - bit[23:0] zeros
sys/dev/drm/radeon/atombios.h
6718
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
6722
UCHAR ucMemoryVenderID; // [7:4] Revision, [3:0] Vendor code
sys/dev/drm/radeon/atombios.h
6723
UCHAR ucRefreshRateFactor; // [1:0]=RefreshFactor (00=8ms, 01=16ms, 10=32ms,11=64ms)
sys/dev/drm/radeon/atombios.h
6724
UCHAR ucFIFODepth; // FIFO depth can be detected during vendor detection, here is hardcoded per memory
sys/dev/drm/radeon/atombios.h
6725
UCHAR ucCDR_Bandwidth; // [0:3]=Read CDR bandwidth, [4:7] - Write CDR Bandwidth
sys/dev/drm/radeon/atombios.h
6732
UCHAR ucNumOfVRAMModule;
sys/dev/drm/radeon/atombios.h
6742
UCHAR aVID_PinsShift[9]; // 8 bit strap maximum+terminator
sys/dev/drm/radeon/atombios.h
6743
UCHAR ucNumOfVRAMModule;
sys/dev/drm/radeon/atombios.h
6757
UCHAR ucMemDQ7_0ByteRemap; // DQ line byte remap, =0: Memory Data line BYTE0, =1: BYTE1, =2: BYTE2, =3: BYTE3
sys/dev/drm/radeon/atombios.h
6759
UCHAR ucReservde[4];
sys/dev/drm/radeon/atombios.h
6760
UCHAR ucNumOfVRAMModule;
sys/dev/drm/radeon/atombios.h
677
UCHAR ucDacStandard; // See definition of ATOM_DACx_xxx, For DEC3.0, bit 7 used as internal flag to indicate DAC2 (==1) or DAC1 (==0)
sys/dev/drm/radeon/atombios.h
6773
UCHAR ucNumOfVRAMModule; // indicate number of VRAM module
sys/dev/drm/radeon/atombios.h
6774
UCHAR ucMemoryClkPatchTblVer; // version of memory AC timing register list
sys/dev/drm/radeon/atombios.h
6775
UCHAR ucVramModuleVer; // indicate ATOM_VRAM_MODUE version
sys/dev/drm/radeon/atombios.h
6776
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
678
UCHAR ucAction; // 0: turn off encoder
sys/dev/drm/radeon/atombios.h
6784
UCHAR aVID_PinsShift[9]; //8 bit strap maximum+terminator
sys/dev/drm/radeon/atombios.h
6791
UCHAR ucTrainingLoop;
sys/dev/drm/radeon/atombios.h
6792
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
6799
UCHAR ucControl;
sys/dev/drm/radeon/atombios.h
6800
UCHAR ucData;
sys/dev/drm/radeon/atombios.h
6801
UCHAR ucSatus;
sys/dev/drm/radeon/atombios.h
6802
UCHAR ucTemp;
sys/dev/drm/radeon/atombios.h
6810
UCHAR ucAct;
sys/dev/drm/radeon/atombios.h
6811
UCHAR ucData;
sys/dev/drm/radeon/atombios.h
6857
UCHAR VbeSignature[4];
sys/dev/drm/radeon/atombios.h
6860
UCHAR Capabilities[4];
sys/dev/drm/radeon/atombios.h
6884
UCHAR Reserved[222];
sys/dev/drm/radeon/atombios.h
6885
UCHAR OemData[256];
sys/dev/drm/radeon/atombios.h
6893
UCHAR RedBPP;
sys/dev/drm/radeon/atombios.h
6894
UCHAR GreenBPP;
sys/dev/drm/radeon/atombios.h
6895
UCHAR BlueBPP;
sys/dev/drm/radeon/atombios.h
6896
UCHAR ReservedBPP;
sys/dev/drm/radeon/atombios.h
6899
UCHAR Reserved[14];
sys/dev/drm/radeon/atombios.h
6906
UCHAR WinAAttributes; // db ? ; window A attributes
sys/dev/drm/radeon/atombios.h
6907
UCHAR WinBAttributes; // db ? ; window B attributes
sys/dev/drm/radeon/atombios.h
6918
UCHAR XCharSize; // db ? ; character cell width in pixels
sys/dev/drm/radeon/atombios.h
6919
UCHAR YCharSize; // db ? ; character cell height in pixels
sys/dev/drm/radeon/atombios.h
6920
UCHAR NumberOfPlanes; // db ? ; number of memory planes
sys/dev/drm/radeon/atombios.h
6921
UCHAR BitsPerPixel; // db ? ; bits per pixel
sys/dev/drm/radeon/atombios.h
6922
UCHAR NumberOfBanks; // db ? ; number of banks
sys/dev/drm/radeon/atombios.h
6923
UCHAR MemoryModel; // db ? ; memory model type
sys/dev/drm/radeon/atombios.h
6924
UCHAR BankSize; // db ? ; bank size in KB
sys/dev/drm/radeon/atombios.h
6925
UCHAR NumberOfImagePages;// db ? ; number of images
sys/dev/drm/radeon/atombios.h
6926
UCHAR ReservedForPageFunction;//db 1 ; reserved for page function
sys/dev/drm/radeon/atombios.h
6929
UCHAR RedMaskSize; // db ? ; size of direct color red mask in bits
sys/dev/drm/radeon/atombios.h
693
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
6930
UCHAR RedFieldPosition; // db ? ; bit position of lsb of red mask
sys/dev/drm/radeon/atombios.h
6931
UCHAR GreenMaskSize; // db ? ; size of direct color green mask in bits
sys/dev/drm/radeon/atombios.h
6932
UCHAR GreenFieldPosition; // db ? ; bit position of lsb of green mask
sys/dev/drm/radeon/atombios.h
6933
UCHAR BlueMaskSize; // db ? ; size of direct color blue mask in bits
sys/dev/drm/radeon/atombios.h
6934
UCHAR BlueFieldPosition; // db ? ; bit position of lsb of blue mask
sys/dev/drm/radeon/atombios.h
6935
UCHAR RsvdMaskSize; // db ? ; size of direct color reserved mask in bits
sys/dev/drm/radeon/atombios.h
6936
UCHAR RsvdFieldPosition; // db ? ; bit position of lsb of reserved mask
sys/dev/drm/radeon/atombios.h
6937
UCHAR DirectColorModeInfo;// db ? ; direct color mode attributes
sys/dev/drm/radeon/atombios.h
6946
UCHAR BnkNumberOfImagePages;// db ? ; number of images for banked modes
sys/dev/drm/radeon/atombios.h
6947
UCHAR LinNumberOfImagPages; // db ? ; number of images for linear modes
sys/dev/drm/radeon/atombios.h
6948
UCHAR LinRedMaskSize; // db ? ; size of direct color red mask(linear modes)
sys/dev/drm/radeon/atombios.h
6949
UCHAR LinRedFieldPosition; // db ? ; bit position of lsb of red mask(linear modes)
sys/dev/drm/radeon/atombios.h
6950
UCHAR LinGreenMaskSize; // db ? ; size of direct color green mask(linear modes)
sys/dev/drm/radeon/atombios.h
6951
UCHAR LinGreenFieldPosition;// db ? ; bit position of lsb of green mask(linear modes)
sys/dev/drm/radeon/atombios.h
6952
UCHAR LinBlueMaskSize; // db ? ; size of direct color blue mask(linear modes)
sys/dev/drm/radeon/atombios.h
6953
UCHAR LinBlueFieldPosition; // db ? ; bit position of lsb of blue mask(linear modes)
sys/dev/drm/radeon/atombios.h
6954
UCHAR LinRsvdMaskSize; // db ? ; size of direct color reserved mask(linear modes)
sys/dev/drm/radeon/atombios.h
6955
UCHAR LinRsvdFieldPosition; // db ? ; bit position of lsb of reserved mask(linear modes)
sys/dev/drm/radeon/atombios.h
6957
UCHAR Reserved; // db 190 dup (0)
sys/dev/drm/radeon/atombios.h
701
UCHAR ucAction; // =0: turn off encoder
sys/dev/drm/radeon/atombios.h
7013
UCHAR ucTransmitterCmdTblId;
sys/dev/drm/radeon/atombios.h
7014
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
7015
UCHAR ucEncoderID; //available 1st encoder ( default )
sys/dev/drm/radeon/atombios.h
7016
UCHAR ucOptionEncoderID; //available 2nd encoder ( optional )
sys/dev/drm/radeon/atombios.h
7017
UCHAR uc2ndEncoderID;
sys/dev/drm/radeon/atombios.h
7018
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
703
UCHAR ucEncoderMode;
sys/dev/drm/radeon/atombios.h
7033
UCHAR ucEncoderID;
sys/dev/drm/radeon/atombios.h
7034
UCHAR ucEncoderConfig;
sys/dev/drm/radeon/atombios.h
7059
UCHAR ucPpllId;
sys/dev/drm/radeon/atombios.h
7060
UCHAR ucPpllAttribute;
sys/dev/drm/radeon/atombios.h
7073
UCHAR ucTransmitterCmdTblId;
sys/dev/drm/radeon/atombios.h
7074
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
7075
UCHAR ucEncoderID; // available 1st encoder ( default )
sys/dev/drm/radeon/atombios.h
7076
UCHAR ucOptionEncoderID; // available 2nd encoder ( optional )
sys/dev/drm/radeon/atombios.h
7077
UCHAR uc2ndEncoderID;
sys/dev/drm/radeon/atombios.h
7078
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
7088
UCHAR ucDCERevision;
sys/dev/drm/radeon/atombios.h
7089
UCHAR ucMaxDispEngineNum;
sys/dev/drm/radeon/atombios.h
709
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/radeon/atombios.h
7090
UCHAR ucMaxActiveDispEngineNum;
sys/dev/drm/radeon/atombios.h
7091
UCHAR ucMaxPPLLNum;
sys/dev/drm/radeon/atombios.h
7092
UCHAR ucCoreRefClkSource; // value of CORE_REF_CLK_SOURCE
sys/dev/drm/radeon/atombios.h
7093
UCHAR ucDispCaps;
sys/dev/drm/radeon/atombios.h
7094
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
710
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
7120
UCHAR ucChannelID;
sys/dev/drm/radeon/atombios.h
7123
UCHAR ucReplyStatus;
sys/dev/drm/radeon/atombios.h
7124
UCHAR ucDelay;
sys/dev/drm/radeon/atombios.h
7126
UCHAR ucDataOutLen;
sys/dev/drm/radeon/atombios.h
7127
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
7135
UCHAR ucChannelID;
sys/dev/drm/radeon/atombios.h
7138
UCHAR ucReplyStatus;
sys/dev/drm/radeon/atombios.h
7139
UCHAR ucDelay;
sys/dev/drm/radeon/atombios.h
7141
UCHAR ucDataOutLen;
sys/dev/drm/radeon/atombios.h
7142
UCHAR ucHPD_ID; //=0: HPD1, =1: HPD2, =2: HPD3, =3: HPD4, =4: HPD5, =5: HPD6
sys/dev/drm/radeon/atombios.h
7154
UCHAR ucConfig; // for DP training command
sys/dev/drm/radeon/atombios.h
7155
UCHAR ucI2cId; // use for GET_SINK_TYPE command
sys/dev/drm/radeon/atombios.h
7157
UCHAR ucAction;
sys/dev/drm/radeon/atombios.h
7158
UCHAR ucStatus;
sys/dev/drm/radeon/atombios.h
7159
UCHAR ucLaneNum;
sys/dev/drm/radeon/atombios.h
7160
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
7188
UCHAR ucAuxId;
sys/dev/drm/radeon/atombios.h
7189
UCHAR ucAction;
sys/dev/drm/radeon/atombios.h
7190
UCHAR ucSinkType; // Iput and Output parameters.
sys/dev/drm/radeon/atombios.h
7191
UCHAR ucHPDId; // Input parameter, used when ucAction = DP_SERVICE_V2_ACTION_DET_EXT_CONNECTION
sys/dev/drm/radeon/atombios.h
7192
UCHAR ucReserved[2];
sys/dev/drm/radeon/atombios.h
7223
UCHAR ucI2CSpeed;
sys/dev/drm/radeon/atombios.h
7226
UCHAR ucRegIndex;
sys/dev/drm/radeon/atombios.h
7227
UCHAR ucStatus;
sys/dev/drm/radeon/atombios.h
7230
UCHAR ucFlag;
sys/dev/drm/radeon/atombios.h
7231
UCHAR ucTransBytes;
sys/dev/drm/radeon/atombios.h
7232
UCHAR ucSlaveAddr;
sys/dev/drm/radeon/atombios.h
7233
UCHAR ucLineNumber;
sys/dev/drm/radeon/atombios.h
7248
UCHAR ucCmd; // Input: To tell which action to take
sys/dev/drm/radeon/atombios.h
7249
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
7255
UCHAR ucReturnCode; // Output: Return value base on action was taken
sys/dev/drm/radeon/atombios.h
7256
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
7278
UCHAR ucHWBlkInst; // HW block instance, 0, 1, 2, ...
sys/dev/drm/radeon/atombios.h
7279
UCHAR ucReserved[3];
sys/dev/drm/radeon/atombios.h
7319
UCHAR ucStartBit;
sys/dev/drm/radeon/atombios.h
7320
UCHAR ucEndBit;
sys/dev/drm/radeon/atombios.h
7325
UCHAR ucEncodeMode;
sys/dev/drm/radeon/atombios.h
7326
UCHAR ucPhySel;
sys/dev/drm/radeon/atombios.h
7342
UCHAR ucCondition2;
sys/dev/drm/radeon/atombios.h
7359
UCHAR ucEncodeMode;
sys/dev/drm/radeon/atombios.h
7360
UCHAR ucPhySel;
sys/dev/drm/radeon/atombios.h
7366
UCHAR ucEncodeMode;
sys/dev/drm/radeon/atombios.h
7367
UCHAR ucPhySel;
sys/dev/drm/radeon/atombios.h
7373
UCHAR ucGfxBlkId; //GFX blk id to be harvested, like CU, RB or PRIM
sys/dev/drm/radeon/atombios.h
7374
UCHAR ucReserved; //reserved
sys/dev/drm/radeon/atombios.h
7375
UCHAR ucActiveUnitNumPerSH; //requested active CU/RB/PRIM number per shader array
sys/dev/drm/radeon/atombios.h
7376
UCHAR ucMaxUnitNumPerSH; //max CU/RB/PRIM number per shader array
sys/dev/drm/radeon/atombios.h
7424
UCHAR ucDAC1_BG_Adjustment;
sys/dev/drm/radeon/atombios.h
7425
UCHAR ucDAC1_DAC_Adjustment;
sys/dev/drm/radeon/atombios.h
7428
UCHAR ucDAC2_CRT2_BG_Adjustment;
sys/dev/drm/radeon/atombios.h
7429
UCHAR ucDAC2_CRT2_DAC_Adjustment;
sys/dev/drm/radeon/atombios.h
7432
UCHAR ucDAC2_CRT2_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low
sys/dev/drm/radeon/atombios.h
7433
UCHAR ucDAC2_NTSC_BG_Adjustment;
sys/dev/drm/radeon/atombios.h
7434
UCHAR ucDAC2_NTSC_DAC_Adjustment;
sys/dev/drm/radeon/atombios.h
7437
UCHAR ucDAC2_TV1_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low
sys/dev/drm/radeon/atombios.h
7438
UCHAR ucDAC2_CV_BG_Adjustment;
sys/dev/drm/radeon/atombios.h
7439
UCHAR ucDAC2_CV_DAC_Adjustment;
sys/dev/drm/radeon/atombios.h
7442
UCHAR ucDAC2_CV_MUX_RegisterInfo; //Bit[4:0]=Bit position,Bit[7]=1:Active High;=0 Active Low
sys/dev/drm/radeon/atombios.h
7443
UCHAR ucDAC2_PAL_BG_Adjustment;
sys/dev/drm/radeon/atombios.h
7444
UCHAR ucDAC2_PAL_DAC_Adjustment;
sys/dev/drm/radeon/atombios.h
7475
UCHAR bfConnectorType:4;
sys/dev/drm/radeon/atombios.h
7476
UCHAR bfAssociatedDAC:4;
sys/dev/drm/radeon/atombios.h
7478
UCHAR bfAssociatedDAC:4;
sys/dev/drm/radeon/atombios.h
7479
UCHAR bfConnectorType:4;
sys/dev/drm/radeon/atombios.h
7486
UCHAR ucAccess;
sys/dev/drm/radeon/atombios.h
7507
UCHAR ucIntSrcBitmap;
sys/dev/drm/radeon/atombios.h
752
UCHAR ucReserved1:2;
sys/dev/drm/radeon/atombios.h
753
UCHAR ucTransmitterSel:2; // =0: UniphyAB, =1: UniphyCD =2: UniphyEF
sys/dev/drm/radeon/atombios.h
7533
UCHAR ucPLL_ChargePump; // PLL charge-pump gain control
sys/dev/drm/radeon/atombios.h
7534
UCHAR ucPLL_DutyCycle; // PLL duty cycle control
sys/dev/drm/radeon/atombios.h
7535
UCHAR ucPLL_VCO_Gain; // PLL VCO gain control
sys/dev/drm/radeon/atombios.h
7536
UCHAR ucPLL_VoltageSwing; // PLL driver voltage swing control
sys/dev/drm/radeon/atombios.h
754
UCHAR ucLinkSel:1; // =0: linkA/C/E =1: linkB/D/F
sys/dev/drm/radeon/atombios.h
755
UCHAR ucReserved:1;
sys/dev/drm/radeon/atombios.h
7552
UCHAR ucTVStandard; //Same as TV standards defined above,
sys/dev/drm/radeon/atombios.h
7553
UCHAR ucPadding[1];
sys/dev/drm/radeon/atombios.h
7558
UCHAR ucAttribute; //Same as other digital encoder attributes defined above
sys/dev/drm/radeon/atombios.h
7559
UCHAR ucPadding[1];
sys/dev/drm/radeon/atombios.h
756
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/radeon/atombios.h
7573
UCHAR ucDeviceType; //Use ATOM_DEVICE_xxx1_Index to indicate device type only.
sys/dev/drm/radeon/atombios.h
7574
UCHAR ucAction; //ATOM_ENABLE/ATOM_DISABLE/ATOM_HPD_INIT
sys/dev/drm/radeon/atombios.h
758
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/radeon/atombios.h
759
UCHAR ucReserved:1;
sys/dev/drm/radeon/atombios.h
7598
UCHAR ucXtransimitterID;
sys/dev/drm/radeon/atombios.h
7599
UCHAR ucSupportedLink; // Bit field, bit0=1, single link supported;bit1=1,dual link supported
sys/dev/drm/radeon/atombios.h
760
UCHAR ucLinkSel:1; // =0: linkA/C/E =1: linkB/D/F
sys/dev/drm/radeon/atombios.h
7600
UCHAR ucSequnceAlterID; // Even with the same external TMDS asic, it's possible that the program seqence alters
sys/dev/drm/radeon/atombios.h
7602
UCHAR ucMasterAddress; // Address to control Master xTMDS Chip
sys/dev/drm/radeon/atombios.h
7603
UCHAR ucSlaveAddress; // Address to control Slave xTMDS Chip
sys/dev/drm/radeon/atombios.h
7608
UCHAR ucEnable; // ATOM_ENABLE=On or ATOM_DISABLE=Off
sys/dev/drm/radeon/atombios.h
7609
UCHAR ucDevice; // ATOM_DEVICE_DFP1_INDEX....
sys/dev/drm/radeon/atombios.h
761
UCHAR ucTransmitterSel:2; // =0: UniphyAB, =1: UniphyCD =2: UniphyEF
sys/dev/drm/radeon/atombios.h
7610
UCHAR ucPadding[2];
sys/dev/drm/radeon/atombios.h
762
UCHAR ucReserved1:2;
sys/dev/drm/radeon/atombios.h
7678
UCHAR ucVoltageDropIndex; // index to GPIO table
sys/dev/drm/radeon/atombios.h
7679
UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate
sys/dev/drm/radeon/atombios.h
7680
UCHAR ucMinTemperature;
sys/dev/drm/radeon/atombios.h
7681
UCHAR ucMaxTemperature;
sys/dev/drm/radeon/atombios.h
7682
UCHAR ucNumPciELanes; // number of PCIE lanes
sys/dev/drm/radeon/atombios.h
7693
UCHAR ucVoltageDropIndex; // index to GPIO table
sys/dev/drm/radeon/atombios.h
7694
UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate
sys/dev/drm/radeon/atombios.h
7695
UCHAR ucMinTemperature;
sys/dev/drm/radeon/atombios.h
7696
UCHAR ucMaxTemperature;
sys/dev/drm/radeon/atombios.h
7697
UCHAR ucNumPciELanes; // number of PCIE lanes
sys/dev/drm/radeon/atombios.h
7708
UCHAR ucVoltageDropIndex; // index to Core (VDDC) votage table
sys/dev/drm/radeon/atombios.h
7709
UCHAR ucSelectedPanel_RefreshRate;// panel refresh rate
sys/dev/drm/radeon/atombios.h
771
UCHAR ucAction;
sys/dev/drm/radeon/atombios.h
7710
UCHAR ucMinTemperature;
sys/dev/drm/radeon/atombios.h
7711
UCHAR ucMaxTemperature;
sys/dev/drm/radeon/atombios.h
7712
UCHAR ucNumPciELanes; // number of PCIE lanes
sys/dev/drm/radeon/atombios.h
7713
UCHAR ucVDDCI_VoltageDropIndex; // index to VDDCI votage table
sys/dev/drm/radeon/atombios.h
772
UCHAR ucEncoderMode;
sys/dev/drm/radeon/atombios.h
7734
UCHAR ucOverdriveThermalController;
sys/dev/drm/radeon/atombios.h
7735
UCHAR ucOverdriveI2cLine;
sys/dev/drm/radeon/atombios.h
7736
UCHAR ucOverdriveIntBitmap;
sys/dev/drm/radeon/atombios.h
7737
UCHAR ucOverdriveControllerAddress;
sys/dev/drm/radeon/atombios.h
7738
UCHAR ucSizeOfPowerModeEntry;
sys/dev/drm/radeon/atombios.h
7739
UCHAR ucNumOfPowerModeEntries;
sys/dev/drm/radeon/atombios.h
7746
UCHAR ucOverdriveThermalController;
sys/dev/drm/radeon/atombios.h
7747
UCHAR ucOverdriveI2cLine;
sys/dev/drm/radeon/atombios.h
7748
UCHAR ucOverdriveIntBitmap;
sys/dev/drm/radeon/atombios.h
7749
UCHAR ucOverdriveControllerAddress;
sys/dev/drm/radeon/atombios.h
7750
UCHAR ucSizeOfPowerModeEntry;
sys/dev/drm/radeon/atombios.h
7751
UCHAR ucNumOfPowerModeEntries;
sys/dev/drm/radeon/atombios.h
7758
UCHAR ucOverdriveThermalController;
sys/dev/drm/radeon/atombios.h
7759
UCHAR ucOverdriveI2cLine;
sys/dev/drm/radeon/atombios.h
7760
UCHAR ucOverdriveIntBitmap;
sys/dev/drm/radeon/atombios.h
7761
UCHAR ucOverdriveControllerAddress;
sys/dev/drm/radeon/atombios.h
7762
UCHAR ucSizeOfPowerModeEntry;
sys/dev/drm/radeon/atombios.h
7763
UCHAR ucNumOfPowerModeEntries;
sys/dev/drm/radeon/atombios.h
778
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/radeon/atombios.h
779
UCHAR ucStatus; // = DP_LINK_TRAINING_COMPLETE or DP_LINK_TRAINING_INCOMPLETE, only used by VBIOS with command ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS
sys/dev/drm/radeon/atombios.h
780
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
7922
UCHAR Revision;
sys/dev/drm/radeon/atombios.h
7923
UCHAR Checksum;
sys/dev/drm/radeon/atombios.h
7924
UCHAR OemId[6];
sys/dev/drm/radeon/atombios.h
7925
UCHAR OemTableId[8]; //UINT64 OemTableId;
sys/dev/drm/radeon/atombios.h
7946
UCHAR TableUUID[16]; //0x24
sys/dev/drm/radeon/atombios.h
7967
UCHAR VbiosContent[1];
sys/dev/drm/radeon/atombios.h
7972
UCHAR Lib1Content[1];
sys/dev/drm/radeon/atombios.h
819
UCHAR ucReserved1:1;
sys/dev/drm/radeon/atombios.h
820
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/radeon/atombios.h
821
UCHAR ucReserved:3;
sys/dev/drm/radeon/atombios.h
822
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/radeon/atombios.h
824
UCHAR ucDPLinkRate:1; // =0: 1.62Ghz, =1: 2.7Ghz
sys/dev/drm/radeon/atombios.h
825
UCHAR ucReserved:3;
sys/dev/drm/radeon/atombios.h
826
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/radeon/atombios.h
827
UCHAR ucReserved1:1;
sys/dev/drm/radeon/atombios.h
846
UCHAR ucAction;
sys/dev/drm/radeon/atombios.h
848
UCHAR ucEncoderMode;
sys/dev/drm/radeon/atombios.h
855
UCHAR ucPanelMode; // only valid when ucAction == ATOM_ENCODER_CMD_SETUP_PANEL_MODE
sys/dev/drm/radeon/atombios.h
860
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/radeon/atombios.h
861
UCHAR ucBitPerColor; // only valid for DP mode when ucAction = ATOM_ENCODER_CMD_SETUP
sys/dev/drm/radeon/atombios.h
862
UCHAR ucReserved;
sys/dev/drm/radeon/atombios.h
872
UCHAR ucReserved1:1;
sys/dev/drm/radeon/atombios.h
873
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/radeon/atombios.h
874
UCHAR ucReserved:2;
sys/dev/drm/radeon/atombios.h
875
UCHAR ucDPLinkRate:2; // =0: 1.62Ghz, =1: 2.7Ghz, 2=5.4Ghz <= Changed comparing to previous version
sys/dev/drm/radeon/atombios.h
877
UCHAR ucDPLinkRate:2; // =0: 1.62Ghz, =1: 2.7Ghz, 2=5.4Ghz <= Changed comparing to previous version
sys/dev/drm/radeon/atombios.h
878
UCHAR ucReserved:2;
sys/dev/drm/radeon/atombios.h
879
UCHAR ucDigSel:3; // =0/1/2/3/4/5: DIG0/1/2/3/4/5 (In register spec also referred as DIGA/B/C/D/E/F)
sys/dev/drm/radeon/atombios.h
880
UCHAR ucReserved1:1;
sys/dev/drm/radeon/atombios.h
903
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
905
UCHAR ucAction;
sys/dev/drm/radeon/atombios.h
907
UCHAR ucEncoderMode;
sys/dev/drm/radeon/atombios.h
914
UCHAR ucPanelMode; // only valid when ucAction == ATOM_ENCODER_CMD_SETUP_PANEL_MODE
sys/dev/drm/radeon/atombios.h
919
UCHAR ucLaneNum; // how many lanes to enable
sys/dev/drm/radeon/atombios.h
920
UCHAR ucBitPerColor; // only valid for DP mode when ucAction = ATOM_ENCODER_CMD_SETUP
sys/dev/drm/radeon/atombios.h
921
UCHAR ucHPD_ID; // HPD ID (1-6). =0 means to skip HDP programming. New comparing to previous version
sys/dev/drm/radeon/atombios.h
944
UCHAR ucLaneSel;
sys/dev/drm/radeon/atombios.h
945
UCHAR ucLaneSet;
sys/dev/drm/radeon/atombios.h
956
UCHAR ucConfig;
sys/dev/drm/radeon/atombios.h
970
UCHAR ucAction; // =0: turn off encoder
sys/dev/drm/radeon/atombios.h
972
UCHAR ucReserved[4];
sys/dev/drm/radeon/pptable.h
102
UCHAR ucFanControlMode;
sys/dev/drm/radeon/pptable.h
151
UCHAR ucDataRevision;
sys/dev/drm/radeon/pptable.h
153
UCHAR ucNumStates;
sys/dev/drm/radeon/pptable.h
154
UCHAR ucStateEntrySize;
sys/dev/drm/radeon/pptable.h
155
UCHAR ucClockInfoSize;
sys/dev/drm/radeon/pptable.h
156
UCHAR ucNonClockSize;
sys/dev/drm/radeon/pptable.h
184
UCHAR ucNumCustomThermalPolicy;
sys/dev/drm/radeon/pptable.h
288
UCHAR ucMinTemperature;
sys/dev/drm/radeon/pptable.h
289
UCHAR ucMaxTemperature;
sys/dev/drm/radeon/pptable.h
290
UCHAR ucThermalAction;
sys/dev/drm/radeon/pptable.h
301
UCHAR ucMinTemperature;
sys/dev/drm/radeon/pptable.h
302
UCHAR ucMaxTemperature;
sys/dev/drm/radeon/pptable.h
304
UCHAR ucRequiredPower;
sys/dev/drm/radeon/pptable.h
308
UCHAR ucUnused[5];
sys/dev/drm/radeon/pptable.h
31
UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_*
sys/dev/drm/radeon/pptable.h
317
UCHAR ucEngineClockHigh;
sys/dev/drm/radeon/pptable.h
32
UCHAR ucI2cLine; // as interpreted by DAL I2C
sys/dev/drm/radeon/pptable.h
320
UCHAR ucMemoryClockHigh;
sys/dev/drm/radeon/pptable.h
33
UCHAR ucI2cAddress;
sys/dev/drm/radeon/pptable.h
34
UCHAR ucFanParameters; // Fan Control Parameters.
sys/dev/drm/radeon/pptable.h
342
UCHAR ucLowEngineClockHigh;
sys/dev/drm/radeon/pptable.h
344
UCHAR ucHighEngineClockHigh;
sys/dev/drm/radeon/pptable.h
346
UCHAR ucMemoryClockHigh; // Currentyl unused.
sys/dev/drm/radeon/pptable.h
347
UCHAR ucPadding; // For proper alignment and size.
sys/dev/drm/radeon/pptable.h
349
UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16}
sys/dev/drm/radeon/pptable.h
35
UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
sys/dev/drm/radeon/pptable.h
350
UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could
sys/dev/drm/radeon/pptable.h
36
UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
sys/dev/drm/radeon/pptable.h
37
UCHAR ucReserved; // ----
sys/dev/drm/radeon/pptable.h
371
UCHAR ucEngineClockHigh;
sys/dev/drm/radeon/pptable.h
374
UCHAR ucMemoryClockHigh;
sys/dev/drm/radeon/pptable.h
38
UCHAR ucFlags; // to be defined
sys/dev/drm/radeon/pptable.h
387
UCHAR ucEngineClockHigh;
sys/dev/drm/radeon/pptable.h
390
UCHAR ucMemoryClockHigh;
sys/dev/drm/radeon/pptable.h
394
UCHAR ucPCIEGen;
sys/dev/drm/radeon/pptable.h
395
UCHAR ucUnused1;
sys/dev/drm/radeon/pptable.h
404
UCHAR ucEngineClockHigh;
sys/dev/drm/radeon/pptable.h
407
UCHAR ucMemoryClockHigh;
sys/dev/drm/radeon/pptable.h
409
UCHAR ucPCIEGen;
sys/dev/drm/radeon/pptable.h
415
UCHAR ucEngineClockHigh; //clockfrequency >> 16.
sys/dev/drm/radeon/pptable.h
416
UCHAR vddcIndex; //2-bit vddc index;
sys/dev/drm/radeon/pptable.h
428
UCHAR ucNumDPMLevels;
sys/dev/drm/radeon/pptable.h
431
UCHAR nonClockInfoIndex;
sys/dev/drm/radeon/pptable.h
435
UCHAR clockInfoIndex[1];
sys/dev/drm/radeon/pptable.h
440
UCHAR ucNumEntries;
sys/dev/drm/radeon/pptable.h
448
UCHAR ucNumEntries;
sys/dev/drm/radeon/pptable.h
451
UCHAR ucEntrySize;
sys/dev/drm/radeon/pptable.h
453
UCHAR clockInfo[1];
sys/dev/drm/radeon/pptable.h
459
UCHAR ucNumEntries;
sys/dev/drm/radeon/pptable.h
461
UCHAR ucEntrySize;
sys/dev/drm/radeon/pptable.h
469
UCHAR ucClockHigh;
sys/dev/drm/radeon/pptable.h
475
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/radeon/pptable.h
482
UCHAR ucSclkHigh;
sys/dev/drm/radeon/pptable.h
484
UCHAR ucMclkHigh;
sys/dev/drm/radeon/pptable.h
491
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/radeon/pptable.h
515
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/radeon/pptable.h
523
UCHAR ucSclkHigh;
sys/dev/drm/radeon/pptable.h
525
UCHAR ucMclkHigh;
sys/dev/drm/radeon/pptable.h
530
UCHAR ucNumEntries; // Number of entries.
sys/dev/drm/radeon/pptable.h
536
UCHAR ucEVClkHigh;
sys/dev/drm/radeon/pptable.h
538
UCHAR ucECClkHigh;
sys/dev/drm/radeon/pptable.h
542
UCHAR ucNumEntries;
sys/dev/drm/radeon/pptable.h
549
UCHAR ucVCEClockInfoIndex;
sys/dev/drm/radeon/pptable.h
554
UCHAR numEntries;
sys/dev/drm/radeon/pptable.h
560
UCHAR ucVCEClockInfoIndex;
sys/dev/drm/radeon/pptable.h
561
UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
sys/dev/drm/radeon/pptable.h
566
UCHAR numEntries;
sys/dev/drm/radeon/pptable.h
573
UCHAR revid;
sys/dev/drm/radeon/pptable.h
582
UCHAR ucVClkHigh;
sys/dev/drm/radeon/pptable.h
584
UCHAR ucDClkHigh;
sys/dev/drm/radeon/pptable.h
588
UCHAR ucNumEntries;
sys/dev/drm/radeon/pptable.h
595
UCHAR ucUVDClockInfoIndex;
sys/dev/drm/radeon/pptable.h
600
UCHAR numEntries;
sys/dev/drm/radeon/pptable.h
606
UCHAR revid;
sys/dev/drm/radeon/pptable.h
615
UCHAR ucSAMClockHigh;
sys/dev/drm/radeon/pptable.h
619
UCHAR numEntries;
sys/dev/drm/radeon/pptable.h
625
UCHAR revid;
sys/dev/drm/radeon/pptable.h
633
UCHAR ucACPClockHigh;
sys/dev/drm/radeon/pptable.h
637
UCHAR numEntries;
sys/dev/drm/radeon/pptable.h
643
UCHAR revid;
sys/dev/drm/radeon/pptable.h
659
UCHAR revid;
sys/dev/drm/radeon/pptable.h
665
UCHAR revid;
sys/dev/drm/radeon/pptable.h
675
UCHAR ucRevId;
sys/dev/drm/radeon/pptable.h
676
UCHAR ucPpmDesign; //A+I or A+A
sys/dev/drm/radeon/pptable.h
76
UCHAR ucNonClockStateIndex;
sys/dev/drm/radeon/pptable.h
77
UCHAR ucClockStateIndices[1]; // variable-sized
sys/dev/drm/radeon/pptable.h
83
UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same.
sys/dev/drm/radeon/pptable.h
84
UCHAR ucTHyst; // Temperature hysteresis. Integer.
sys/dev/raid/hptmv/access601.h
35
UCHAR HPTLIBAPI check_protect_circuit(MV_BUS_ADDR_T BaseAddr);
sys/dev/raid/hptmv/access601.h
38
void HPTLIBAPI set_fail_led(MV_SATA_ADAPTER *pAdapter, UCHAR channel, UCHAR state);
sys/dev/raid/hptmv/access601.h
39
void HPTLIBAPI set_fail_leds(MV_SATA_ADAPTER *pAdapter, UCHAR mask);
sys/dev/raid/hptmv/access601.h
45
int HPTLIBAPI sx508x_ioctl(MV_SATA_ADAPTER *pSataAdapter, UCHAR *indata, ULONG inlen,
sys/dev/raid/hptmv/access601.h
46
UCHAR *outdata, ULONG maxoutlen, ULONG *poutlen);
sys/dev/raid/hptmv/array.h
110
UCHAR bCheckSum; /* check sum of ArrayDescript_3_0_size bytes */
sys/dev/raid/hptmv/array.h
113
UCHAR df_reservedbits: 6; /* put more flags here */
sys/dev/raid/hptmv/array.h
114
UCHAR df_user_mode_set: 1;/* user select device mode */
sys/dev/raid/hptmv/array.h
115
UCHAR df_bootmark:1; /* user set boot mark on the disk */
sys/dev/raid/hptmv/array.h
117
UCHAR df_bootmark:1; /* user set boot mark on the disk */
sys/dev/raid/hptmv/array.h
118
UCHAR df_user_mode_set: 1;/* user select device mode */
sys/dev/raid/hptmv/array.h
119
UCHAR df_reservedbits: 6; /* put more flags here */
sys/dev/raid/hptmv/array.h
122
UCHAR bUserDeviceMode; /* see device.h */
sys/dev/raid/hptmv/array.h
123
UCHAR ArrayLevel; /* how many level[] is valid */
sys/dev/raid/hptmv/array.h
128
UCHAR VDeviceType; /* see above & arrayType in array.h */
sys/dev/raid/hptmv/array.h
129
UCHAR bMemberCount; /* all disk in the array */
sys/dev/raid/hptmv/array.h
130
UCHAR bSerialNumber; /* Serial Number */
sys/dev/raid/hptmv/array.h
131
UCHAR bArBlockSizeShift; /* the number of shift bit for a block */
sys/dev/raid/hptmv/array.h
146
UCHAR ArrayName[MAX_ARRAY_NAME]; /* The Name of the array */
sys/dev/raid/hptmv/array.h
148
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/array.h
149
UCHAR CreateManager[16]; /* who created it */
sys/dev/raid/hptmv/array.h
154
UCHAR bCheckSum31; /* new check sum */
sys/dev/raid/hptmv/array.h
155
UCHAR PrivateFlag1; /* private */
sys/dev/raid/hptmv/array.h
156
UCHAR alreadyBroken; /* last stamp has been saved to failedStamps */
sys/dev/raid/hptmv/array.h
159
UCHAR df_read_ahead: 1; /* enable read ahead */
sys/dev/raid/hptmv/array.h
160
UCHAR df_read_ahead_set: 1;
sys/dev/raid/hptmv/array.h
161
UCHAR df_write_cache: 1; /* enable write cache */
sys/dev/raid/hptmv/array.h
162
UCHAR df_write_cache_set: 1;
sys/dev/raid/hptmv/array.h
163
UCHAR df_ncq: 1; /* enable NCQ */
sys/dev/raid/hptmv/array.h
164
UCHAR df_ncq_set: 1;
sys/dev/raid/hptmv/array.h
165
UCHAR df_tcq: 1; /* enable TCQ */
sys/dev/raid/hptmv/array.h
166
UCHAR df_tcq_set: 1;
sys/dev/raid/hptmv/array.h
168
UCHAR df_tcq_set: 1;
sys/dev/raid/hptmv/array.h
169
UCHAR df_tcq: 1; /* enable TCQ */
sys/dev/raid/hptmv/array.h
170
UCHAR df_ncq_set: 1;
sys/dev/raid/hptmv/array.h
171
UCHAR df_ncq: 1; /* enable NCQ */
sys/dev/raid/hptmv/array.h
172
UCHAR df_write_cache_set: 1;
sys/dev/raid/hptmv/array.h
173
UCHAR df_write_cache: 1; /* enable write cache */
sys/dev/raid/hptmv/array.h
174
UCHAR df_read_ahead_set: 1;
sys/dev/raid/hptmv/array.h
175
UCHAR df_read_ahead: 1; /* enable read ahead */
sys/dev/raid/hptmv/array.h
261
UCHAR CheckSum(UCHAR *p, int size);
sys/dev/raid/hptmv/array.h
59
UCHAR bArnMember; /* the number of members in array */
sys/dev/raid/hptmv/array.h
60
UCHAR bArRealnMember; /* real member count */
sys/dev/raid/hptmv/array.h
61
UCHAR bArBlockSizeShift; /* the number of shift bit for a block */
sys/dev/raid/hptmv/array.h
62
UCHAR reserve1;
sys/dev/raid/hptmv/array.h
86
UCHAR last_read; /* for RAID 1 load banlancing */
sys/dev/raid/hptmv/array.h
87
UCHAR alreadyBroken;
sys/dev/raid/hptmv/array.h
95
UCHAR ArrayName[MAX_ARRAY_NAME]; /* The Name of the array */
sys/dev/raid/hptmv/array.h
97
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/array.h
98
UCHAR CreateManager[16]; /* who created it */
sys/dev/raid/hptmv/atapi.h
160
UCHAR AlternateStatus; /* RW: device control port */
sys/dev/raid/hptmv/atapi.h
201
UCHAR MaximumBlockTransfer; /* 5E 47 */
sys/dev/raid/hptmv/atapi.h
202
UCHAR VendorUnique2; /* 5F */
sys/dev/raid/hptmv/atapi.h
206
UCHAR VendorUnique3; /* 66 51 */
sys/dev/raid/hptmv/atapi.h
207
UCHAR PioCycleTimingMode; /* 67 */
sys/dev/raid/hptmv/atapi.h
208
UCHAR VendorUnique4; /* 68 52 */
sys/dev/raid/hptmv/atapi.h
209
UCHAR DmaCycleTimingMode; /* 69 */
sys/dev/raid/hptmv/atapi.h
217
UCHAR SingleWordDMASupport; /* 7C 62 */
sys/dev/raid/hptmv/atapi.h
218
UCHAR SingleWordDMAActive; /* 7D */
sys/dev/raid/hptmv/atapi.h
219
UCHAR MultiWordDMASupport; /* 7E 63 */
sys/dev/raid/hptmv/atapi.h
220
UCHAR MultiWordDMAActive; /* 7F */
sys/dev/raid/hptmv/atapi.h
221
UCHAR AdvancedPIOModes; /* 80 64 */
sys/dev/raid/hptmv/atapi.h
222
UCHAR Reserved4; /* 81 */
sys/dev/raid/hptmv/atapi.h
255
UCHAR Signature; /* 0xA5 */
sys/dev/raid/hptmv/atapi.h
256
UCHAR CheckSum;
sys/dev/raid/hptmv/atapi.h
278
UCHAR MaximumBlockTransfer; /* 5E 47 */
sys/dev/raid/hptmv/atapi.h
279
UCHAR VendorUnique2; /* 5F */
sys/dev/raid/hptmv/atapi.h
283
UCHAR VendorUnique3; /* 66 51 */
sys/dev/raid/hptmv/atapi.h
284
UCHAR PioCycleTimingMode; /* 67 */
sys/dev/raid/hptmv/atapi.h
285
UCHAR VendorUnique4; /* 68 52 */
sys/dev/raid/hptmv/atapi.h
286
UCHAR DmaCycleTimingMode; /* 69 */
sys/dev/raid/hptmv/atapi.h
294
UCHAR SingleWordDMASupport; /* 62 */
sys/dev/raid/hptmv/atapi.h
295
UCHAR SingleWordDMAActive;
sys/dev/raid/hptmv/atapi.h
296
UCHAR MultiWordDMASupport; /* 63 */
sys/dev/raid/hptmv/atapi.h
297
UCHAR MultiWordDMAActive;
sys/dev/raid/hptmv/atapi.h
298
UCHAR AdvancedPIOModes; /* 64 */
sys/dev/raid/hptmv/atapi.h
299
UCHAR Reserved4;
sys/dev/raid/hptmv/atapi.h
355
#define mGetStatus(IOPort2) (UCHAR)InPort(&IOPort2->AlternateStatus)
sys/dev/raid/hptmv/atapi.h
356
#define mUnitControl(IOPort2, Value) OutPort(&IOPort2->AlternateStatus,(UCHAR)(Value))
sys/dev/raid/hptmv/atapi.h
358
#define mGetErrorCode(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->Data+1)
sys/dev/raid/hptmv/atapi.h
361
#define mGetBlockCount(IOPort) (UCHAR)InPort(&IOPort->BlockCount)
sys/dev/raid/hptmv/atapi.h
362
#define mGetInterruptReason(IOPort) (UCHAR)InPort(&IOPort->BlockCount)
sys/dev/raid/hptmv/atapi.h
364
#define mGetBlockNumber(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->BlockNumber)
sys/dev/raid/hptmv/atapi.h
365
#define mGetByteLow(IOPort) (UCHAR)InPort(&IOPort->CylinderLow)
sys/dev/raid/hptmv/atapi.h
367
#define mGetByteHigh(IOPort) (UCHAR)InPort(&IOPort->CylinderHigh)
sys/dev/raid/hptmv/atapi.h
369
#define mGetBaseStatus(IOPort) (UCHAR)InPort(&IOPort->Command)
sys/dev/raid/hptmv/atapi.h
372
OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\
sys/dev/raid/hptmv/atapi.h
373
OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\
sys/dev/raid/hptmv/atapi.h
376
#define mSelectUnit(IOPort,UnitId) OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId))
sys/dev/raid/hptmv/atapi.h
379
#define mIssueCommand(IOPort,Cmd) OutPort(&IOPort->Command, (UCHAR)(Cmd))
sys/dev/raid/hptmv/atapi.h
43
UCHAR BlockCount; /* RW: Sector count */
sys/dev/raid/hptmv/atapi.h
44
UCHAR BlockNumber; /* RW: Sector number & LBA 0-7 */
sys/dev/raid/hptmv/atapi.h
45
UCHAR CylinderLow; /* RW: Cylinder low & LBA 8-15 */
sys/dev/raid/hptmv/atapi.h
46
UCHAR CylinderHigh; /* RW: Cylinder hign & LBA 16-23 */
sys/dev/raid/hptmv/atapi.h
47
UCHAR DriveSelect; /* RW: Drive/head & LBA 24-27 */
sys/dev/raid/hptmv/atapi.h
48
UCHAR Command; /* RO: Status WR:Command */
sys/dev/raid/hptmv/command.h
104
UCHAR Atapi[12];
sys/dev/raid/hptmv/command.h
118
UCHAR Result;
sys/dev/raid/hptmv/command.h
120
UCHAR RetryCount;
sys/dev/raid/hptmv/command.h
139
UCHAR FirstMember; /* the sequence number of the first member */
sys/dev/raid/hptmv/command.h
140
UCHAR LastMember; /* the sequence number of the last member */
sys/dev/raid/hptmv/command.h
146
UCHAR InSameLine; /* if the start and end on the same line */
sys/dev/raid/hptmv/command.h
147
UCHAR pad1;
sys/dev/raid/hptmv/command.h
155
UCHAR ParDiskNo; /* parity for startLba */
sys/dev/raid/hptmv/command.h
156
UCHAR BadDiskNo;
sys/dev/raid/hptmv/command.h
157
UCHAR FirstMember;
sys/dev/raid/hptmv/command.h
158
UCHAR pad1;
sys/dev/raid/hptmv/command.h
170
UCHAR nstripes;
sys/dev/raid/hptmv/command.h
171
UCHAR finished_stripes;
sys/dev/raid/hptmv/command.h
175
UCHAR cmds;
sys/dev/raid/hptmv/command.h
176
UCHAR finished;
sys/dev/raid/hptmv/command.h
177
UCHAR first;
sys/dev/raid/hptmv/command.h
178
UCHAR parity;
sys/dev/raid/hptmv/command.h
190
UCHAR cmd;
sys/dev/raid/hptmv/command.h
202
UCHAR bIdeStatus;
sys/dev/raid/hptmv/command.h
203
UCHAR errorRegister;
sys/dev/raid/hptmv/command.h
38
UCHAR Command; /* IDE_COMMAND_READ, _WRITE, _VERIFY */
sys/dev/raid/hptmv/command.h
39
UCHAR QueueTag;
sys/dev/raid/hptmv/command.h
70
UCHAR Command; /* CTRL_CMD_XXX */
sys/dev/raid/hptmv/command.h
71
UCHAR reserve1;
sys/dev/raid/hptmv/command.h
87
UCHAR Command; /* CTRL_CMD_XXX */
sys/dev/raid/hptmv/command.h
88
UCHAR reserve1;
sys/dev/raid/hptmv/entry.c
1064
fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer)
sys/dev/raid/hptmv/entry.c
1069
void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode)
sys/dev/raid/hptmv/entry.c
1074
UCHAR mvMode;
sys/dev/raid/hptmv/entry.c
1120
UCHAR depth = ((pSataChannel->identifyDevice[IDEN_QUEUE_DEPTH]) & 0x1f) + 1;
sys/dev/raid/hptmv/entry.c
148
void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR);
sys/dev/raid/hptmv/entry.c
150
UCHAR flags;
sys/dev/raid/hptmv/entry.c
154
UCHAR DPC_Request_Nums = 0;
sys/dev/raid/hptmv/entry.c
1822
(MV_U16)( (is48bit? (MV_U16)((Lba >> 16) & 0xFF00) : 0 ) | (UCHAR)(Lba & 0xFF) ), /*lbalow*/
sys/dev/raid/hptmv/entry.c
1825
(MV_U8)(0x40 | (is48bit ? 0 : (UCHAR)(Lba >> 24) & 0xFF )),/* device */
sys/dev/raid/hptmv/entry.c
2498
(UCHAR)((pVDev->u.array.CriticalMembers || pVDev->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
sys/dev/raid/hptmv/entry.c
2525
pSg[idx].dSgAddress = (ULONG_PTR)(UCHAR *)sgList[idx].ds_addr;
sys/dev/raid/hptmv/entry.c
2531
pSg->dSgAddress = (ULONG_PTR)(UCHAR *)ccb->csio.data_ptr;
sys/dev/raid/hptmv/entry.c
2564
inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5);
sys/dev/raid/hptmv/entry.c
2655
psg->dSgAddress = (ULONG_PTR)(UCHAR *)segs[idx].ds_addr;
sys/dev/raid/hptmv/entry.c
2717
UCHAR *rbuf=csio->data_ptr;
sys/dev/raid/hptmv/entry.c
2726
rbuf[0] = (UCHAR)(cap>>24);
sys/dev/raid/hptmv/entry.c
2727
rbuf[1] = (UCHAR)(cap>>16);
sys/dev/raid/hptmv/entry.c
2728
rbuf[2] = (UCHAR)(cap>>8);
sys/dev/raid/hptmv/entry.c
2729
rbuf[3] = (UCHAR)cap;
sys/dev/raid/hptmv/entry.c
2742
UCHAR *rbuf = csio->data_ptr;
sys/dev/raid/hptmv/entry.c
2745
rbuf[0] = (UCHAR)(cap>>56);
sys/dev/raid/hptmv/entry.c
2746
rbuf[1] = (UCHAR)(cap>>48);
sys/dev/raid/hptmv/entry.c
2747
rbuf[2] = (UCHAR)(cap>>40);
sys/dev/raid/hptmv/entry.c
2748
rbuf[3] = (UCHAR)(cap>>32);
sys/dev/raid/hptmv/entry.c
2749
rbuf[4] = (UCHAR)(cap>>24);
sys/dev/raid/hptmv/entry.c
2750
rbuf[5] = (UCHAR)(cap>>16);
sys/dev/raid/hptmv/entry.c
2751
rbuf[6] = (UCHAR)(cap>>8);
sys/dev/raid/hptmv/entry.c
2752
rbuf[7] = (UCHAR)cap;
sys/dev/raid/hptmv/entry.c
2771
UCHAR Cdb[16];
sys/dev/raid/hptmv/entry.c
2772
UCHAR CdbLength;
sys/dev/raid/hptmv/entry.c
2860
pCmd->pSgTable[idx].dSgAddress = (ULONG_PTR)(UCHAR *)sgList[idx].ds_addr;
sys/dev/raid/hptmv/entry.c
2950
hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags)
sys/dev/raid/hptmv/global.h
113
UCHAR gui_locked; /* the device is locked by GUI */
sys/dev/raid/hptmv/global.h
114
UCHAR reserve[3];
sys/dev/raid/hptmv/global.h
177
extern void HPTLIBAPI ioctl_ReportEvent(UCHAR event, PVOID param);
sys/dev/raid/hptmv/global.h
179
#define DECLARE_BUFFER(type, ptr) UCHAR ptr##__buf[512]; type ptr=(type)ptr##__buf
sys/dev/raid/hptmv/global.h
181
int HPTLIBAPI fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer);
sys/dev/raid/hptmv/global.h
182
void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode);
sys/dev/raid/hptmv/global.h
71
UCHAR df_on_line;
sys/dev/raid/hptmv/global.h
72
UCHAR df_atapi;
sys/dev/raid/hptmv/global.h
73
UCHAR df_removable_drive;
sys/dev/raid/hptmv/global.h
74
UCHAR busyCount;
sys/dev/raid/hptmv/global.h
76
UCHAR df_tcq_set: 1;
sys/dev/raid/hptmv/global.h
77
UCHAR df_tcq: 1; /* enable TCQ */
sys/dev/raid/hptmv/global.h
78
UCHAR df_ncq_set: 1;
sys/dev/raid/hptmv/global.h
79
UCHAR df_ncq: 1; /* enable NCQ */
sys/dev/raid/hptmv/global.h
80
UCHAR df_write_cache_set: 1;
sys/dev/raid/hptmv/global.h
81
UCHAR df_write_cache: 1; /* enable write cache */
sys/dev/raid/hptmv/global.h
82
UCHAR df_read_ahead_set: 1;
sys/dev/raid/hptmv/global.h
83
UCHAR df_read_ahead: 1; /* enable read ahead */
sys/dev/raid/hptmv/global.h
85
UCHAR retryCount;
sys/dev/raid/hptmv/global.h
86
UCHAR resetCount;
sys/dev/raid/hptmv/global.h
87
UCHAR pad1;
sys/dev/raid/hptmv/global.h
89
UCHAR df_user_mode_set;
sys/dev/raid/hptmv/global.h
90
UCHAR bDeModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
sys/dev/raid/hptmv/global.h
91
UCHAR bDeUsable_Mode; /* actual maximum data transfer mode */
sys/dev/raid/hptmv/global.h
92
UCHAR bDeUserSelectMode;
sys/dev/raid/hptmv/gui_lib.c
104
static UCHAR get_vdev_type(PVDevice pVDevice)
sys/dev/raid/hptmv/gui_lib.c
1077
fDeSelectMode((PDevice)&(pVDevice->u.disk), (UCHAR)pInfo->DeviceModeSetting);
sys/dev/raid/hptmv/gui_lib.c
293
pDiskInfo->ControllerId = (UCHAR)pSataAdapter->adapterId;
sys/dev/raid/hptmv/gui_lib.c
738
UCHAR TempBuffer[512];
sys/dev/raid/hptmv/hptintf.h
1097
int hpt_lock_device(DEVICEID idDisk, ULONG Lba, UCHAR nSectors);
sys/dev/raid/hptmv/hptintf.h
1139
int hpt_verify_data_block(DEVICEID idArray, ULONG Lba, UCHAR nSectors);
sys/dev/raid/hptmv/hptintf.h
1156
int hpt_initialize_data_block(DEVICEID idArray, ULONG Lba, UCHAR nSectors);
sys/dev/raid/hptmv/hptintf.h
271
UCHAR MaximumControllers; /* maximum controllers the driver can support */
sys/dev/raid/hptmv/hptintf.h
272
UCHAR SupportCrossControllerRAID; /* 1-support, 0-not support */
sys/dev/raid/hptmv/hptintf.h
273
UCHAR MinimumBlockSizeShift; /* minimum block size shift */
sys/dev/raid/hptmv/hptintf.h
274
UCHAR MaximumBlockSizeShift; /* maximum block size shift */
sys/dev/raid/hptmv/hptintf.h
276
UCHAR SupportDiskModeSetting;
sys/dev/raid/hptmv/hptintf.h
277
UCHAR SupportSparePool;
sys/dev/raid/hptmv/hptintf.h
278
UCHAR MaximumArrayNameLength;
sys/dev/raid/hptmv/hptintf.h
281
UCHAR reserved: 4;
sys/dev/raid/hptmv/hptintf.h
282
UCHAR SupportHotSwap: 1;
sys/dev/raid/hptmv/hptintf.h
283
UCHAR HighPerformanceRAID1: 1;
sys/dev/raid/hptmv/hptintf.h
284
UCHAR RebuildProcessInDriver: 1;
sys/dev/raid/hptmv/hptintf.h
285
UCHAR SupportDedicatedSpare: 1;
sys/dev/raid/hptmv/hptintf.h
287
UCHAR SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */
sys/dev/raid/hptmv/hptintf.h
288
UCHAR RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */
sys/dev/raid/hptmv/hptintf.h
289
UCHAR HighPerformanceRAID1: 1; /* Support RAID1.5 */
sys/dev/raid/hptmv/hptintf.h
290
UCHAR SupportHotSwap: 1;
sys/dev/raid/hptmv/hptintf.h
291
UCHAR reserved: 4;
sys/dev/raid/hptmv/hptintf.h
300
UCHAR SupportedRAIDTypes[16];
sys/dev/raid/hptmv/hptintf.h
302
UCHAR MaximumArrayMembers[16];
sys/dev/raid/hptmv/hptintf.h
310
UCHAR ChipType; /* chip type */
sys/dev/raid/hptmv/hptintf.h
311
UCHAR InterruptLevel; /* IRQ level */
sys/dev/raid/hptmv/hptintf.h
312
UCHAR NumBuses; /* bus count */
sys/dev/raid/hptmv/hptintf.h
313
UCHAR ChipFlags;
sys/dev/raid/hptmv/hptintf.h
315
UCHAR szProductID[MAX_NAME_LENGTH]; /* product name */
sys/dev/raid/hptmv/hptintf.h
316
UCHAR szVendorID[MAX_NAME_LENGTH]; /* vender name */
sys/dev/raid/hptmv/hptintf.h
349
UCHAR Name[MAX_ARRAYNAME_LEN];/* array name */
sys/dev/raid/hptmv/hptintf.h
350
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/hptintf.h
351
UCHAR CreateManager[16]; /* who created it */
sys/dev/raid/hptmv/hptintf.h
354
UCHAR ArrayType; /* array type */
sys/dev/raid/hptmv/hptintf.h
355
UCHAR BlockSizeShift; /* stripe size */
sys/dev/raid/hptmv/hptintf.h
356
UCHAR nDisk; /* member count: Number of ID in Members[] */
sys/dev/raid/hptmv/hptintf.h
357
UCHAR reserved;
sys/dev/raid/hptmv/hptintf.h
386
UCHAR Name[MAX_ARRAYNAME_LEN];/* array name */
sys/dev/raid/hptmv/hptintf.h
387
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/hptintf.h
388
UCHAR CreateManager[16]; /* who created it */
sys/dev/raid/hptmv/hptintf.h
391
UCHAR ArrayType; /* array type */
sys/dev/raid/hptmv/hptintf.h
392
UCHAR BlockSizeShift; /* stripe size */
sys/dev/raid/hptmv/hptintf.h
393
UCHAR nDisk; /* member count: Number of ID in Members[] */
sys/dev/raid/hptmv/hptintf.h
394
UCHAR reserved;
sys/dev/raid/hptmv/hptintf.h
426
UCHAR MaximumBlockTransfer; /* 5E 47 */
sys/dev/raid/hptmv/hptintf.h
427
UCHAR VendorUnique2; /* 5F */
sys/dev/raid/hptmv/hptintf.h
431
UCHAR VendorUnique3; /* 66 51 */
sys/dev/raid/hptmv/hptintf.h
432
UCHAR PioCycleTimingMode; /* 67 */
sys/dev/raid/hptmv/hptintf.h
433
UCHAR VendorUnique4; /* 68 52 */
sys/dev/raid/hptmv/hptintf.h
434
UCHAR DmaCycleTimingMode; /* 69 */
sys/dev/raid/hptmv/hptintf.h
467
UCHAR ControllerId; /* controller id */
sys/dev/raid/hptmv/hptintf.h
468
UCHAR PathId; /* bus */
sys/dev/raid/hptmv/hptintf.h
469
UCHAR TargetId; /* id */
sys/dev/raid/hptmv/hptintf.h
470
UCHAR DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
sys/dev/raid/hptmv/hptintf.h
472
UCHAR DeviceType; /* device type */
sys/dev/raid/hptmv/hptintf.h
473
UCHAR UsableMode; /* highest usable mode */
sys/dev/raid/hptmv/hptintf.h
475
UCHAR ReadAheadSupported: 1;
sys/dev/raid/hptmv/hptintf.h
476
UCHAR ReadAheadEnabled: 1;
sys/dev/raid/hptmv/hptintf.h
477
UCHAR WriteCacheSupported: 1;
sys/dev/raid/hptmv/hptintf.h
478
UCHAR WriteCacheEnabled: 1;
sys/dev/raid/hptmv/hptintf.h
479
UCHAR TCQSupported: 1;
sys/dev/raid/hptmv/hptintf.h
480
UCHAR TCQEnabled: 1;
sys/dev/raid/hptmv/hptintf.h
481
UCHAR NCQSupported: 1;
sys/dev/raid/hptmv/hptintf.h
482
UCHAR NCQEnabled: 1;
sys/dev/raid/hptmv/hptintf.h
483
UCHAR reserved;
sys/dev/raid/hptmv/hptintf.h
519
UCHAR Type; /* LDT_ARRAY or LDT_DEVICE */
sys/dev/raid/hptmv/hptintf.h
520
UCHAR reserved[3];
sys/dev/raid/hptmv/hptintf.h
534
UCHAR Type; /* LDT_ARRAY or LDT_DEVICE */
sys/dev/raid/hptmv/hptintf.h
535
UCHAR reserved[3];
sys/dev/raid/hptmv/hptintf.h
565
UCHAR Name[MAX_ARRAYNAME_LEN]; /* array name */
sys/dev/raid/hptmv/hptintf.h
566
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/hptintf.h
572
UCHAR DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
sys/dev/raid/hptmv/hptintf.h
578
UCHAR DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
sys/dev/raid/hptmv/hptintf.h
579
UCHAR TCQEnabled;
sys/dev/raid/hptmv/hptintf.h
580
UCHAR NCQEnabled;
sys/dev/raid/hptmv/hptintf.h
581
UCHAR WriteCacheEnabled;
sys/dev/raid/hptmv/hptintf.h
582
UCHAR ReadAheadEnabled;
sys/dev/raid/hptmv/hptintf.h
583
UCHAR reserve[3];
sys/dev/raid/hptmv/hptintf.h
593
UCHAR ArrayType; /* 1-level array type */
sys/dev/raid/hptmv/hptintf.h
594
UCHAR nDisk; /* number of elements in Members[] array */
sys/dev/raid/hptmv/hptintf.h
595
UCHAR BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
sys/dev/raid/hptmv/hptintf.h
596
UCHAR CreateFlags; /* See CAF_xxx */
sys/dev/raid/hptmv/hptintf.h
598
UCHAR ArrayName[MAX_ARRAYNAME_LEN]; /* Array name */
sys/dev/raid/hptmv/hptintf.h
599
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/hptintf.h
600
UCHAR CreateManager[16]; /* who created it */
sys/dev/raid/hptmv/hptintf.h
609
UCHAR ArrayType; /* 1-level array type */
sys/dev/raid/hptmv/hptintf.h
610
UCHAR nDisk; /* number of elements in Members[] array */
sys/dev/raid/hptmv/hptintf.h
611
UCHAR BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
sys/dev/raid/hptmv/hptintf.h
612
UCHAR CreateFlags; /* See CAF_xxx */
sys/dev/raid/hptmv/hptintf.h
614
UCHAR ArrayName[MAX_ARRAYNAME_LEN]; /* Array name */
sys/dev/raid/hptmv/hptintf.h
615
UCHAR Description[64]; /* array description */
sys/dev/raid/hptmv/hptintf.h
616
UCHAR CreateManager[16]; /* who created it */
sys/dev/raid/hptmv/hptintf.h
684
UCHAR EventType;
sys/dev/raid/hptmv/hptintf.h
685
UCHAR reserved[3];
sys/dev/raid/hptmv/hptintf.h
687
UCHAR Data[32]; /* various data depend on EventType */
sys/dev/raid/hptmv/hptintf.h
719
UCHAR Command; /* IO_COMMAD_xxx */
sys/dev/raid/hptmv/hptintf.h
720
UCHAR BufferType; /* BUFFER_TYPE_xxx, see below */
sys/dev/raid/hptmv/hptintf.h
990
int hpt_rebuild_data_block(DEVICEID idMirror, DWORD Lba, UCHAR nSector);
sys/dev/raid/hptmv/hptproc.c
153
for (i = 0; (UCHAR)i < pArray->u.array.bArnMember; i++)
sys/dev/raid/hptmv/hptproc.c
412
for (i = 0; (UCHAR)i < pArray->u.array.bArnMember; i++)
sys/dev/raid/hptmv/hptproc.c
444
for (i = 0; (UCHAR)i < pArray->u.array.bArnMember; i++)
sys/dev/raid/hptmv/hptproc.c
83
(UCHAR)((pArray->u.array.CriticalMembers || pArray->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
sys/dev/raid/hptmv/ioctl.c
114
ioctl_ReportEvent(UCHAR event, PVOID param)
sys/dev/raid/hptmv/ioctl.c
490
(UCHAR)((pVDevice->u.array.CriticalMembers || pVDevice->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
sys/dev/raid/hptmv/ioctl.c
51
UCHAR nSector;
sys/dev/raid/hptmv/ioctl.c
691
hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray, UCHAR flags)
sys/dev/raid/hptmv/mvStorageDev.h
213
MV_BOOLEAN HPTLIBAPI mvReadWrite(MV_SATA_CHANNEL *pSataChannel, LBA_T Lba, UCHAR Cmd, void *tmpBuffer);
sys/dev/raid/hptmv/osbsd.h
186
UCHAR status;
sys/dev/raid/hptmv/osbsd.h
187
UCHAR ver_601;
sys/dev/raid/hptmv/osbsd.h
188
UCHAR beeping;
sys/dev/raid/hptmv/osbsd.h
197
typedef void (*HPT_DPC)(IAL_ADAPTER_T *,void*,UCHAR);
sys/dev/raid/hptmv/osbsd.h
199
int hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T *pAdapter, void *arg, UCHAR flags);
sys/dev/raid/hptmv/osbsd.h
200
void hpt_rebuild_data_block(IAL_ADAPTER_T *pAdapter, PVDevice pArray, UCHAR flags);
sys/dev/raid/hptmv/osbsd.h
264
UCHAR buffer[0];
sys/dev/raid/hptmv/osbsd.h
303
UCHAR buffer[0];
sys/dev/raid/hptmv/osbsd.h
58
UCHAR status; /* 0 nonbootable; 80h bootable */
sys/dev/raid/hptmv/osbsd.h
59
UCHAR start_head;
sys/dev/raid/hptmv/osbsd.h
61
UCHAR type;
sys/dev/raid/hptmv/osbsd.h
62
UCHAR end_head;
sys/dev/raid/hptmv/osbsd.h
69
UCHAR DeviceType : 5;
sys/dev/raid/hptmv/osbsd.h
70
UCHAR DeviceTypeQualifier : 3;
sys/dev/raid/hptmv/osbsd.h
71
UCHAR DeviceTypeModifier : 7;
sys/dev/raid/hptmv/osbsd.h
72
UCHAR RemovableMedia : 1;
sys/dev/raid/hptmv/osbsd.h
73
UCHAR Versions;
sys/dev/raid/hptmv/osbsd.h
74
UCHAR ResponseDataFormat;
sys/dev/raid/hptmv/osbsd.h
75
UCHAR AdditionalLength;
sys/dev/raid/hptmv/osbsd.h
76
UCHAR Reserved[2];
sys/dev/raid/hptmv/osbsd.h
77
UCHAR SoftReset : 1;
sys/dev/raid/hptmv/osbsd.h
78
UCHAR CommandQueue : 1;
sys/dev/raid/hptmv/osbsd.h
79
UCHAR Reserved2 : 1;
sys/dev/raid/hptmv/osbsd.h
80
UCHAR LinkedCommands : 1;
sys/dev/raid/hptmv/osbsd.h
81
UCHAR Synchronous : 1;
sys/dev/raid/hptmv/osbsd.h
82
UCHAR Wide16Bit : 1;
sys/dev/raid/hptmv/osbsd.h
83
UCHAR Wide32Bit : 1;
sys/dev/raid/hptmv/osbsd.h
84
UCHAR RelativeAddressing : 1;
sys/dev/raid/hptmv/osbsd.h
85
UCHAR VendorId[8];
sys/dev/raid/hptmv/osbsd.h
86
UCHAR ProductId[16];
sys/dev/raid/hptmv/osbsd.h
87
UCHAR ProductRevisionLevel[4];
sys/dev/raid/hptmv/osbsd.h
88
UCHAR VendorSpecific[20];
sys/dev/raid/hptmv/osbsd.h
89
UCHAR Reserved3[40];
sys/dev/raid/hptmv/vdevice.h
249
UCHAR bootid; /* bootable? 0=no, 128=yes */
sys/dev/raid/hptmv/vdevice.h
250
UCHAR beghead; /* beginning head number */
sys/dev/raid/hptmv/vdevice.h
251
UCHAR begsect; /* beginning sector number */
sys/dev/raid/hptmv/vdevice.h
252
UCHAR begcyl; /* 10 bit nmbr, with high 2 bits put in begsect */
sys/dev/raid/hptmv/vdevice.h
253
UCHAR systid; /* Operating System type indicator code */
sys/dev/raid/hptmv/vdevice.h
254
UCHAR endhead; /* ending head number */
sys/dev/raid/hptmv/vdevice.h
255
UCHAR endsect; /* ending sector number */
sys/dev/raid/hptmv/vdevice.h
256
UCHAR endcyl; /* also a 10 bit nmbr, with same high 2 bit trick */
sys/dev/raid/hptmv/vdevice.h
263
UCHAR bootinst[446]; /* space to hold actual boot code */
sys/dev/raid/hptmv/vdevice.h
38
UCHAR VDeviceType;
sys/dev/raid/hptmv/vdevice.h
39
UCHAR vf_bootmark: 1; /* is boot device? */
sys/dev/raid/hptmv/vdevice.h
40
UCHAR vf_bootable: 1; /* has active partition */
sys/dev/raid/hptmv/vdevice.h
41
UCHAR vf_online: 1; /* is usable? */
sys/dev/raid/hptmv/vdevice.h
42
UCHAR vf_cache_disk: 1; /* Cache enabled */
sys/dev/raid/hptmv/vdevice.h
43
UCHAR vf_format_v2: 1; /* old array block */
sys/dev/raid/hptmv/vdevice.h
44
UCHAR vf_freed: 1; /* memory free */
sys/dev/raid/hptmv/vdevice.h
45
UCHAR reserve1;
sys/dev/raid/hptmv/vdevice.h
46
UCHAR bSerialNumber; /* valid if pParent!=0 */