Symbol: mmUVD_VCPU_CACHE_OFFSET1
sys/dev/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h
89
#define mmUVD_VCPU_CACHE_OFFSET1 0x3D38
sys/dev/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h
62
#define mmUVD_VCPU_CACHE_OFFSET1 0x3d84
sys/dev/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h
68
#define mmUVD_VCPU_CACHE_OFFSET1 0x3d84
sys/dev/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h
84
#define mmUVD_VCPU_CACHE_OFFSET1 0x3d84
sys/dev/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h
180
#define mmUVD_VCPU_CACHE_OFFSET1 0x0584
sys/dev/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
366
#define mmUVD_VCPU_CACHE_OFFSET1 0x0584