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mmUVD_RB_BASE_LO
sys/dev/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h
44
#define mmUVD_RB_BASE_LO 0x3c26
sys/dev/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h
94
#define mmUVD_RB_BASE_LO 0x0426
sys/dev/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
214
#define mmUVD_RB_BASE_LO 0x0426
