Symbol: mmUVD_JRBC_RB_WPTR
sys/dev/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h
126
#define mmUVD_JRBC_RB_WPTR 0x0509
sys/dev/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
260
#define mmUVD_JRBC_RB_WPTR 0x0509