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mmSDMA0_GFX_RB_WPTR_HI
sys/dev/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h
220
#define mmSDMA0_GFX_RB_WPTR_HI 0x0086
sys/dev/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h
216
#define mmSDMA0_GFX_RB_WPTR_HI 0x0086
sys/dev/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h
216
#define mmSDMA0_GFX_RB_WPTR_HI 0x0086
