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mmMP1_SMN_C2PMSG_66
sys/dev/drm/amd/include/asic_reg/mp/mp_10_0_offset.h
250
#define mmMP1_SMN_C2PMSG_66 0x0282
sys/dev/drm/amd/include/asic_reg/mp/mp_11_0_offset.h
252
#define mmMP1_SMN_C2PMSG_66 0x0282
sys/dev/drm/amd/include/asic_reg/mp/mp_9_0_offset.h
262
#define mmMP1_SMN_C2PMSG_66 0x0282
