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mmIA_UTCL1_CNTL
sys/dev/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
302
#define mmIA_UTCL1_CNTL 0x0246
sys/dev/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
298
#define mmIA_UTCL1_CNTL 0x0246
sys/dev/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
292
#define mmIA_UTCL1_CNTL 0x0246
