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mmGC_EDC_THRESHOLD
sys/dev/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2911
#define mmGC_EDC_THRESHOLD 0x1294
sys/dev/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
3196
#define mmGC_EDC_THRESHOLD 0x1294
sys/dev/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
3152
#define mmGC_EDC_THRESHOLD 0x1294
