Symbol: mmCP_HQD_IQ_TIMER
sys/dev/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2801
#define mmCP_HQD_IQ_TIMER 0x125b
sys/dev/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
3084
#define mmCP_HQD_IQ_TIMER 0x125b
sys/dev/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
3040
#define mmCP_HQD_IQ_TIMER 0x125b
sys/dev/drm/amd/include/asic_reg/gca/gfx_7_0_d.h
589
#define mmCP_HQD_IQ_TIMER 0x325b
sys/dev/drm/amd/include/asic_reg/gca/gfx_7_2_d.h
602
#define mmCP_HQD_IQ_TIMER 0x325b
sys/dev/drm/amd/include/asic_reg/gca/gfx_8_0_d.h
652
#define mmCP_HQD_IQ_TIMER 0x325b
sys/dev/drm/amd/include/asic_reg/gca/gfx_8_1_d.h
652
#define mmCP_HQD_IQ_TIMER 0x325b