Symbol: UVD_CGC_CTRL__UDEC_RE_MODE_MASK
sys/dev/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h
72
#define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x00000800L
sys/dev/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h
227
#define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800
sys/dev/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h
249
#define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800
sys/dev/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h
251
#define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800
sys/dev/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
444
#define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x00000800L
sys/dev/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h
932
#define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x00000800L