Symbol: UVD_CGC_CTRL__REGS_MODE_MASK
sys/dev/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h
56
#define UVD_CGC_CTRL__REGS_MODE_MASK 0x00080000L
sys/dev/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h
243
#define UVD_CGC_CTRL__REGS_MODE_MASK 0x80000
sys/dev/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h
265
#define UVD_CGC_CTRL__REGS_MODE_MASK 0x80000
sys/dev/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h
267
#define UVD_CGC_CTRL__REGS_MODE_MASK 0x80000
sys/dev/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
452
#define UVD_CGC_CTRL__REGS_MODE_MASK 0x00080000L
sys/dev/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h
940
#define UVD_CGC_CTRL__REGS_MODE_MASK 0x00080000L