Symbol: RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK
sys/dev/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
22947
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x00040000L
sys/dev/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
24363
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x00040000L
sys/dev/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
24416
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x00040000L
sys/dev/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h
7238
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x00040000L
sys/dev/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h
7853
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x40000
sys/dev/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h
8761
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x40000
sys/dev/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h
9313
#define RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PD_ENABLE_MASK 0x40000