Symbol: MPLL_SS1__CLKV__SHIFT
sys/dev/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h
11503
#define MPLL_SS1__CLKV__SHIFT 0x00000000
sys/dev/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h
9540
#define MPLL_SS1__CLKV__SHIFT 0x0
sys/dev/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h
10454
#define MPLL_SS1__CLKV__SHIFT 0x0