Symbol: DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE__SHIFT
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
42
#define DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE__SHIFT 0xa
sys/dev/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h
3589
#define DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE__SHIFT 0xa