Symbol: CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK
sys/dev/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
12781
#define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x00003F00L
sys/dev/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
14210
#define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x00003F00L
sys/dev/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
14075
#define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x00003F00L
sys/dev/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h
3341
#define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x3f00
sys/dev/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h
3955
#define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x3f00
sys/dev/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h
4477
#define CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE_MASK 0x3f00