Symbol: CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK
sys/dev/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h
233
#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x2
sys/dev/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
223
#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x2
sys/dev/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h
223
#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x2
sys/dev/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h
223
#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x2
sys/dev/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
223
#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x2
sys/dev/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
249
#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x2